release v0.2.0

Author: newAM

.github/workflows/ci.yml

@@ -3,8 +3,6 @@ on:
     branches:
       - main
   pull_request:
-  # schedule:
-  #   - cron: "13 3 * * *"
 
 name: CI
 

CHANGELOG.md

@@ -4,7 +4,12 @@ All notable changes to this project will be documented in this file.
 The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/),
 and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).
 
-## [Unreleased]
+## [0.2.0] - 2021-11-11
+### Added
+- Added two board support crates
+  - `nucleo-wl55jc-bsp`
+  - `lora-e5-bsp`
+
 ### Changed
 - Crate ownership changed from [tweedegolf] to [stm32-rs].
   - Thank you [tweedegolf] for the initial development effort!
@@ -15,6 +20,6 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 
 [tweedegolf]: https://github.com/tweedegolf
 [stm32-rs]: https://github.com/stm32-rs
-
-[Unreleased]: https://github.com/stm32-rs/stm32wlxx-hal
+[Unreleased]: https://github.com/stm32-rs/stm32wlxx-hal/compare/v0.2.0...HEAD
+[0.2.0]: https://github.com/stm32-rs/stm32wlxx-hal/releases/tag/v0.2.0
 [0.1.0]: https://github.com/tweedegolf/stm32wlxx-hal

README.md

@@ -1,13 +1,14 @@
 # stm32wlxx-hal
 
 [![CI](https://github.com/stm32-rs/stm32wlxx-hal/workflows/CI/badge.svg)](https://github.com/stm32-rs/stm32wlxx-hal/actions?query=branch%3Amain)
-[![docs](https://img.shields.io/badge/docs-gh--pages-blue)](https://stm32-rs.github.io/stm32wlxx-hal/stm32wlxx_hal/index.html)
+[![stable-docs](https://img.shields.io/badge/docs-stable-blue)](https://docs.rs/stm32wlxx-hal/)
+[![nightly-docs](https://img.shields.io/badge/docs-nightly-blue)](https://stm32-rs.github.io/stm32wlxx-hal/stm32wlxx_hal/index.html)
+[![crates.io](https://img.shields.io/crates/v/stm32wlxx-hal.svg)](https://crates.io/crates/stm32wlxx-hal)
+![license](https://img.shields.io/crates/l/stm32wlxx-hal?color=green)
 
 Embedded rust HAL (hardware abstraction layer) for the STM32WL series.
 
-⚠️ This is a **work in progress** ⚠️
-
-The code that exists today covers basic usage of:
+This is still in development, the code that exists today covers basic usage of:
 
 * SubGHz LoRa TX + RX
 * SubGHz (G)FSK TX + RX

hal/Cargo.toml

@@ -3,10 +3,10 @@ name = "stm32wlxx-hal"
 description = "Hardware abstraction layer for the STM32WL series microcontrollers."
 readme = "README.md"
 
-version = "0.2.0"
+version = "0.2.0"  # update BSP versions, HAL depdendency version, and README
 authors = ["Alex Martens <alexmgit@protonmail.com>"]
 edition = "2021"
-rust-version = "1.56"
+rust-version = "1.56"  # update MSRV in CI, change BSPs to match
 license = "MIT OR Apache-2.0"
 keywords = ["arm", "cortex-m", "stm32", "hal"]
 categories = ["embedded", "hardware-support", "no-std"]

hal/README.md

@@ -1,14 +1,10 @@
-# STM32WL Hardware Abstraction Layer
+# STM32WLxx Hardware Abstraction Layer
 
 ## Usage
 
-This crate is not yet published to crates.io, see issue [#149] for details.
-Until then please pin the version you use.
-
 ```toml
 [dependencies.stm32wlxx-hal]
-git = "https://github.com/stm32-rs/stm32wlxx-hal.git"
-rev = "" # put a specific git commit hash here
+version = "0.2.0"
 features = [
     # use exactly one of the following depending on your target hardware
     "stm32wl5x_cm0p",
@@ -24,7 +20,7 @@ features = [
 # use the interrupt macro from the hal with `use stm32wlxx_hal::pac::interrupt;`
 # DO NOT use the interrupt macro from cortex-m-rt, it will fail to compile
 [dependencies]
-cortex-m-rt = "0.6"
+cortex-m-rt = "0.7"
 ```
 
 **Note:** To avoid version mismatches do not include `cortex-m`, `embedded-hal`,
@@ -42,6 +38,7 @@ use hal::pac; // published as "stm32wl" on crates.io
 ## Design
 
 ### Peripheral Access
+
 The layout of device memory for the STM32WL is provided from the vendor in a
 format called system view description (SVD).
 The SVD is not perfect, so there is a set of community maintained SVD
@@ -83,19 +80,5 @@ let aes: Aes = Aes::new(dp.AES, &mut dp.RCC);
 let pka: Pka = Pka::new(dp.PKA, &mut dp.RCC);
 ```
 
-Generally speaking the driver structures have the following methods, though
-this is not consistent (see [#78])
-
-* `new` create a driver from a PAC struct
-* `free` dystroy the driver and reclaim the PAC struct
-* `steal` steal the driver
-* `mask_irq` mask the peripheral
-* `unmask_irq` unmask the peripheral IRQ
-* `pulse_reset` reset the peripheral
-* `disable_clock` disable the peripheral clock (for power saving)
-* `enable_clock` enable the peripheral clock
-
 [stm32-rs]: https://github.com/stm32-rs/stm32-rs
 [svd2rust]: https://github.com/rust-embedded/svd2rust
-[#78]: https://github.com/stm32-rs/stm32wlxx-hal/issues/78
-[#149]: https://github.com/stm32-rs/stm32wlxx-hal/issues/149

lora-e5-bsp/README.md

@@ -2,17 +2,20 @@
 
 Board support for the seeed LoRa-E5 development kit.
 
-This crate extends the [stm32wlxx-hal] crate, see that crate for more information.
+This crate extends the [stm32wlxx-hal] with board specific hardware, see that crate for more information.
 
 ## Flashing
 
-This board is a pain to get working for the first time because of the pre-programmed firmware.
+This board is a pain to get working for the first time because the flash protection bits are set.
 
 Check these resources to unlock the board for programming:
 
 * [How to program a LoRa-E5](https://forum.seeedstudio.com/t/how-to-program-a-lora-e5/257491)
 * [seeed-lora/LoRa-E5-LoRaWAN-End-Node](https://github.com/seeed-lora/LoRa-E5-LoRaWAN-End-Node#getting-started)
 
-To flash this board with various rust utilities such as probe-run, cargo-embed, and cargo-flash remove the `--connected-under-reset` flag. This flag is required for the NUCLEO board, but will cause timeout errors with the LoRa-E5 development board.
+To flash this board with various rust utilities such as `probe-run`, `cargo-embed`, and `cargo-flash` remove the `--connected-under-reset` flag. This flag is required for the NUCLEO board, but will cause timeout errors with the LoRa-E5 development board.
+
+Flashing binaries larger than 64k with `probe-rs` based tools will hard fault, see [#74] for more information.
 
 [stm32wlxx-hal]: https://github.com/stm32-rs/stm32wlxx-hal
+[#74]: https://github.com/stm32-rs/stm32wlxx-hal/issues/74

nucleo-wl55jc-bsp/README.md

@@ -2,10 +2,13 @@
 
 Board support for the NUCLEO-WL55JC development board.
 
-This crate extends the [stm32wlxx-hal] crate, see that crate for more information.
+This crate extends the [stm32wlxx-hal] with board specific hardware, see that crate for more information.
 
 ## Flashing
 
-To flash this board with various rust utilities such as probe-run, cargo-embed, and cargo-flash use the `--connected-under-reset` flag.
+To flash this board with various rust utilities such as `probe-run`, `cargo-embed`, and `cargo-flash` use the `--connected-under-reset` flag.
+
+Flashing binaries larger than 64k with `probe-rs` based tools will hard fault, see [#74] for more information.
 
 [stm32wlxx-hal]: https://github.com/stm32-rs/stm32wlxx-hal
+[#74]: https://github.com/stm32-rs/stm32wlxx-hal/issues/74

testsuite/README.md

@@ -14,7 +14,11 @@ These tests will run automatically as part of CI for every pull-request.
   ([probe-run], [newAM/probe-run])
     * **Note:** My fork contains unreleased fixes for the stm32wl,
       see [#74] for details.
-* (Linux users only) udev rules are available at [newAM/nucleo-wl55jc2-rs]
+* Linux users: Add udev rules then run `sudo udevadm control --reload-rules && sudo udevadm trigger`
+```text
+# /etc/udev/rules.d/99-stm.rules
+SUBSYSTEM=="usb", ATTRS{idVendor}=="0483", ATTRS{idProduct}=="374e", MODE="0666"
+```
 * Connect the nucleo board to your PC via USB
 * `cargo run -p testsuite --target thumbv7em-none-eabi --bin pka`
 
@@ -72,7 +76,6 @@ $ cargo test -p testsuite --target thumbv7em-none-eabi --bin subghz -- --probe 0
 ```
 
 [defmt-test]: https://crates.io/crates/defmt-test
-[newAM/nucleo-wl55jc2-rs]: https://github.com/newAM/nucleo-wl55jc2-rs
 [newAM/probe-run]: https://github.com/newAM/probe-run
 [probe-run]: https://github.com/knurling-rs/probe-run
 [rustup]: https://rustup.rs/