@@ -70,6 +70,21 @@ pub struct Spi<SPI, PINS> {
70
70
macro_rules! hal {
71
71
( $( $SPIX: ident: ( $spiX: ident, $spiX_slave: ident, $pclkX: ident) , ) +) => {
72
72
$(
73
+ impl <PINS > Spi <$SPIX, PINS > {
74
+ /// Enable the SPI peripheral.
75
+ #[ allow( unused) ] // Only used for DMA.
76
+ #[ inline]
77
+ fn enable( & mut self ) {
78
+ self . spi. cr1. modify( |_, w| w. spe( ) . set_bit( ) ) ;
79
+ }
80
+
81
+ /// Disable the SPI peripheral.
82
+ #[ inline]
83
+ fn disable( & mut self ) {
84
+ self . spi. cr1. modify( |_, w| w. spe( ) . clear_bit( ) ) ;
85
+ }
86
+ }
87
+
73
88
impl <SCK , MISO , MOSI > Spi <$SPIX, ( SCK , MISO , MOSI ) > {
74
89
/// Configures the SPI peripheral to operate in full duplex master mode
75
90
#[ allow( unused_unsafe) ] // Necessary for stm32l4r9
@@ -192,7 +207,7 @@ macro_rules! hal {
192
207
/// Change the baud rate of the SPI
193
208
#[ allow( unused_unsafe) ] // Necessary for stm32l4r9
194
209
pub fn reclock( & mut self , freq: Hertz , clocks: Clocks ) {
195
- self . spi . cr1 . modify ( |_ , w| w . spe ( ) . clear_bit ( ) ) ;
210
+ self . disable ( ) ;
196
211
self . spi. cr1. modify( |_, w| unsafe {
197
212
w. br( ) . bits( Self :: compute_baud_rate( clocks. $pclkX( ) , freq) ) ;
198
213
w. spe( ) . set_bit( )
@@ -543,21 +558,30 @@ macro_rules! spi_dma {
543
558
impl <PINS > SpiRxDma <$SPIX, PINS , $RX_CH> {
544
559
pub fn split( mut self ) -> ( Spi <$SPIX, PINS >, $RX_CH) {
545
560
self . stop( ) ;
546
- ( self . payload. spi, self . channel)
561
+ let mut spi = self . payload. spi;
562
+ // Keep the peripheral itself enabled after stopping DMA.
563
+ spi. enable( ) ;
564
+ ( spi, self . channel)
547
565
}
548
566
}
549
567
550
568
impl <PINS > SpiTxDma <$SPIX, PINS , $TX_CH> {
551
569
pub fn split( mut self ) -> ( Spi <$SPIX, PINS >, $TX_CH) {
552
570
self . stop( ) ;
553
- ( self . payload. spi, self . channel)
571
+ let mut spi = self . payload. spi;
572
+ // Keep the peripheral itself enabled after stopping DMA.
573
+ spi. enable( ) ;
574
+ ( spi, self . channel)
554
575
}
555
576
}
556
577
557
578
impl <PINS > SpiRxTxDma <$SPIX, PINS , $RX_CH, $TX_CH> {
558
579
pub fn split( mut self ) -> ( Spi <$SPIX, PINS >, $RX_CH, $TX_CH) {
559
580
self . stop( ) ;
560
- ( self . payload. spi, self . rx_channel, self . tx_channel)
581
+ let mut spi = self . payload. spi;
582
+ // Keep the peripheral itself enabled after stopping DMA.
583
+ spi. enable( ) ;
584
+ ( spi, self . rx_channel, self . tx_channel)
561
585
}
562
586
}
563
587
@@ -572,14 +596,14 @@ macro_rules! spi_dma {
572
596
// 2. Enable DMA streams for Tx and Rx in DMA registers, if the streams are used.
573
597
// 3. Enable DMA Tx buffer in the TXDMAEN bit in the SPI_CR2 register, if DMA Tx is used.
574
598
// 4. Enable the SPI by setting the SPE bit.
575
- self . payload. spi. spi . cr1 . modify ( |_ , w| w . spe ( ) . clear_bit ( ) ) ; // 0.
599
+ self . payload. spi. disable ( ) ; // 0.
576
600
self . payload
577
601
. spi
578
602
. spi
579
603
. cr2
580
604
. modify( |_, w| w. rxdmaen( ) . set_bit( ) ) ; // 1.
581
605
self . channel. start( ) ; // 2.
582
- self . payload. spi. spi . cr1 . modify ( |_ , w| w . spe ( ) . set_bit ( ) ) ; // 4.
606
+ self . payload. spi. enable ( ) ; // 4.
583
607
}
584
608
585
609
fn stop( & mut self ) {
@@ -592,7 +616,7 @@ macro_rules! spi_dma {
592
616
// 3. Disable DMA Tx and Rx buffers by clearing the TXDMAEN and RXDMAEN bits in the
593
617
// SPI_CR2 register, if DMA Tx and/or DMA Rx are used.
594
618
self . channel. stop( ) ; // 1.
595
- self . payload. spi. spi . cr1 . modify ( |_ , w| w . spe ( ) . clear_bit ( ) ) ; // 2.
619
+ self . payload. spi. disable ( ) ; // 2.
596
620
self . payload
597
621
. spi
598
622
. spi
@@ -612,14 +636,14 @@ macro_rules! spi_dma {
612
636
// 2. Enable DMA streams for Tx and Rx in DMA registers, if the streams are used.
613
637
// 3. Enable DMA Tx buffer in the TXDMAEN bit in the SPI_CR2 register, if DMA Tx is used.
614
638
// 4. Enable the SPI by setting the SPE bit.
615
- self . payload. spi. spi . cr1 . modify ( |_ , w| w . spe ( ) . clear_bit ( ) ) ; // 0.
639
+ self . payload. spi. disable ( ) ; // 0.
616
640
self . channel. start( ) ; // 2.
617
641
self . payload
618
642
. spi
619
643
. spi
620
644
. cr2
621
645
. modify( |_, w| w. txdmaen( ) . set_bit( ) ) ; // 3.
622
- self . payload. spi. spi . cr1 . modify ( |_ , w| w . spe ( ) . set_bit ( ) ) ; // 4.
646
+ self . payload. spi. enable ( ) ; // 4.
623
647
}
624
648
625
649
fn stop( & mut self ) {
@@ -632,7 +656,7 @@ macro_rules! spi_dma {
632
656
// 3. Disable DMA Tx and Rx buffers by clearing the TXDMAEN and RXDMAEN bits in the
633
657
// SPI_CR2 register, if DMA Tx and/or DMA Rx are used.
634
658
self . channel. stop( ) ; // 1.
635
- self . payload. spi. spi . cr1 . modify ( |_ , w| w . spe ( ) . clear_bit ( ) ) ; // 2.
659
+ self . payload. spi. disable ( ) ; // 2.
636
660
self . payload
637
661
. spi
638
662
. spi
@@ -652,7 +676,7 @@ macro_rules! spi_dma {
652
676
// 2. Enable DMA streams for Tx and Rx in DMA registers, if the streams are used.
653
677
// 3. Enable DMA Tx buffer in the TXDMAEN bit in the SPI_CR2 register, if DMA Tx is used.
654
678
// 4. Enable the SPI by setting the SPE bit.
655
- self . payload. spi. spi . cr1 . modify ( |_ , w| w . spe ( ) . clear_bit ( ) ) ; // 0.
679
+ self . payload. spi. disable ( ) ; // 0.
656
680
self . payload
657
681
. spi
658
682
. spi
@@ -665,7 +689,7 @@ macro_rules! spi_dma {
665
689
. spi
666
690
. cr2
667
691
. modify( |_, w| w. txdmaen( ) . set_bit( ) ) ; // 3.
668
- self . payload. spi. spi . cr1 . modify ( |_ , w| w . spe ( ) . set_bit ( ) ) ; // 4.
692
+ self . payload. spi. enable ( ) ; // 4.
669
693
}
670
694
671
695
fn stop( & mut self ) {
@@ -679,7 +703,7 @@ macro_rules! spi_dma {
679
703
// SPI_CR2 register, if DMA Tx and/or DMA Rx are used.
680
704
self . tx_channel. stop( ) ; // 1.
681
705
self . rx_channel. stop( ) ; // 1.
682
- self . payload. spi. spi . cr1 . modify ( |_ , w| w . spe ( ) . clear_bit ( ) ) ; // 2.
706
+ self . payload. spi. disable ( ) ; // 2.
683
707
self . payload
684
708
. spi
685
709
. spi
0 commit comments