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lines changed Original file line number Diff line number Diff line change @@ -455,6 +455,12 @@ pub unsafe fn new_unchecked<const TD: usize, const RD: usize>(
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// Ensure syscfg is enabled (for PMCR)
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rcc. apb4enr . modify ( |_, w| w. syscfgen ( ) . set_bit ( ) ) ;
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+ // Reset ETH_DMA - write 1 and wait for 0.
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+ // On the H723, we have to do this before prec.enable()
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+ // or the DMA will never come out of reset
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+ eth_dma. dmamr . modify ( |_, w| w. swr ( ) . set_bit ( ) ) ;
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+ while eth_dma. dmamr . read ( ) . swr ( ) . bit_is_set ( ) { }
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+
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// AHB1 ETH1MACEN
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prec. enable ( ) ;
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@@ -465,16 +471,14 @@ pub unsafe fn new_unchecked<const TD: usize, const RD: usize>(
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. modify ( |_, w| w. eth1txen ( ) . set_bit ( ) . eth1rxen ( ) . set_bit ( ) ) ;
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syscfg. pmcr . modify ( |_, w| w. epis ( ) . bits ( 0b100 ) ) ; // RMII
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+
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}
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// reset ETH_MAC - write 1 then 0
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//rcc.ahb1rstr.modify(|_, w| w.eth1macrst().set_bit());
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//rcc.ahb1rstr.modify(|_, w| w.eth1macrst().clear_bit());
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cortex_m:: interrupt:: free ( |_cs| {
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- // reset ETH_DMA - write 1 and wait for 0
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- eth_dma. dmamr . modify ( |_, w| w. swr ( ) . set_bit ( ) ) ;
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- while eth_dma. dmamr . read ( ) . swr ( ) . bit_is_set ( ) { }
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// 200 MHz
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eth_mac
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