v0.11.0

Author: richardeoin

CHANGELOG.md

@@ -1,29 +1,48 @@
 # Changelog
 
 ## [Unreleased]
-* Fixed clippy lints:
-   * Added safety docs for some DMA functions
-   * Implemented additional conversion utilities for `time`
-   * **Breaking**: Changed I2S constructors to take less arguments
 
-* MSRV increased to 1.52.0
+## [v0.11.0] 2021-12-18
+
 * **Breaking**: Simplified API for reading device signature
   values. `VAL::get().read()` becomes `VAL::read()`
-* adc: Allow parallel execution of multiple ADCs through `start_conversion()`
-* Rename the PeripheralREC object for BDMA2 on 7B3, 7B0, 7A3 parts from BDMA to BDMA2
-* pac: Upgrade to stm32-rs v0.14.0
-* Add "rt" to the default features
-* **Breaking**: `qspi` flag renamed to `xspi`
 * **Breaking**: SAI `sai_[ab]_ker_ck` methods now return `Hertz` rather than
   `Option<Hertz>` and if the clock is stopped they panic with a message.
-
+* **Breaking**: Rename the `quadspi` flag to `xspi`
+* **Breaking**: serial: manual control over data length removed, now set automatically based on parity [#297][297]
+* Upgrade to cortex-m-rt v0.7.0 [#257][257] [#264][264]
+* **Breaking**: If you use RTIC v0.5, you need to depend on it with
+  `default-features = false, features = ["cortex-m-7"]`. See
+  [rtic-rs/cortex-m-rtic#509](https://github.com/rtic-rs/cortex-m-rtic/pull/509)
+* Add support for OCTOSPI on supported parts, also using the `xspi` feature flag [#230][230]
+* Add support for STM32H735 (feature flag `stm32h735` [#235][235]
+* Rename the PeripheralREC object for BDMA2 on 7B3, 7B0, 7A3 parts from BDMA to BDMA2
+* Fixed clippy lints:
+   * Added safety docs for some DMA functions
+   * Implemented additional conversion utilities for `time`
+   * **Breaking**: Changed I2S constructors to take less arguments
+* MSRV increased to 1.52.0
+* Add "rt" to the default features [#287][287]
+* adc: Allow parallel execution of multiple ADCs through `start_conversion()` [#250][250]
+* dma: Add support for MDMA [#186][186]
 * ethernet: `ethernet::DesRing` and `ethernet::EthernetDMA` require generic
   constants to specify how many transmit / receive buffers to include in
-  `ethernet::DesRing`. To replicate the previous behaviour, use `DesRing<4, 4>`
-* spi: Utilise FIFO in `Transfer` and `Write` implementations
-* **Breaking**: manual control over serial data length removed, now set automatically based on parity
-
-## [v0.10.0] 2021-07-xx
+  `ethernet::DesRing`. To replicate the previous behaviour, use `DesRing<4, 4>` [#247][247]
+* ethernet: Avoid creating intermediate references to packed fields [#225][225]
+* ethernet: Upgrade smoltcp to v0.8.0 [#292][292]
+* ethernet: Fix MAC address filtering [#249][249]
+* gpio: Implement IoPin [#256][256]
+* gpio: Add InputPin implementation for Alternate Pins [#244][244]
+* i2c: Fix scldec/sdadel and adjust i2c divider calculations [#252][252]
+* pac: Upgrade to stm32-rs v0.14.0 [#240][240]
+* quadspi: Add support for flash memory
+* rng: Implement rand_core::RngCore and support all integers in Rng [#284][284]
+* sdmmc: Implement [embedded-sdmmc](https://github.com/rust-embedded-community/embedded-sdmmc-rs) traits [#262][262]
+* spi: use the FIFO in Transfer and Write implementations [#269][269]
+* serial: Improve sync mode support, add additional config options [#261][261] [#267][267]
+* serial: Fix parity configuration option [#242][242]
+
+## [v0.10.0] 2021-07-21
 
 * **Breaking**: Don't reset peripheral in DMA1/2 `StreamsTuple::new()` method #229
 * adc: Add `free()` method for ADC12 #213
@@ -35,8 +54,6 @@
 * spi: Add more hardware CS features #216
 * timers: Better calculations for `set_timeout_ticks` #208
 
-* **Breaking**: Rename the `quadspi` flag to `xspi`
-
 ## [v0.9.0] 2021-03-12
 
 * Updates `cortex-m` to v0.7.1. `cortex-m` v0.6.5+ [are forward compatible with
@@ -160,7 +177,8 @@
 * Upgrade to stm32-rs v0.9.0 (including svd2rust v0.16)
 * Started Changelog
 
-[Unreleased]: https://github.com/stm32-rs/stm32h7xx-hal/compare/v0.10.0...HEAD
+[Unreleased]: https://github.com/stm32-rs/stm32h7xx-hal/compare/v0.11.0...HEAD
+[v0.11.0]: https://github.com/stm32-rs/stm32h7xx-hal/compare/v0.10.0...v0.11.0
 [v0.10.0]: https://github.com/stm32-rs/stm32h7xx-hal/compare/v0.9.0...v0.10.0
 [v0.9.0]: https://github.com/stm32-rs/stm32h7xx-hal/compare/v0.8.0...v0.9.0
 [v0.8.0]: https://github.com/stm32-rs/stm32h7xx-hal/compare/v0.7.1...v0.8.0
@@ -170,3 +188,29 @@
 [v0.5.0]: https://github.com/stm32-rs/stm32h7xx-hal/compare/v0.4.0...v0.5.0
 [v0.4.0]: https://github.com/stm32-rs/stm32h7xx-hal/compare/v0.3.0...v0.4.0
 [v0.3.0]: https://github.com/stm32-rs/stm32h7xx-hal/compare/v0.2.1...v0.3.0
+
+[186]: https://github.com/stm32-rs/stm32h7xx-hal/pull/186
+[225]: https://github.com/stm32-rs/stm32h7xx-hal/pull/225
+[230]: https://github.com/stm32-rs/stm32h7xx-hal/pull/230
+[235]: https://github.com/stm32-rs/stm32h7xx-hal/pull/235
+[240]: https://github.com/stm32-rs/stm32h7xx-hal/pull/240
+[242]: https://github.com/stm32-rs/stm32h7xx-hal/pull/242
+[244]: https://github.com/stm32-rs/stm32h7xx-hal/pull/244
+[247]: https://github.com/stm32-rs/stm32h7xx-hal/pull/247
+[249]: https://github.com/stm32-rs/stm32h7xx-hal/pull/249
+[250]: https://github.com/stm32-rs/stm32h7xx-hal/pull/250
+[252]: https://github.com/stm32-rs/stm32h7xx-hal/pull/252
+[256]: https://github.com/stm32-rs/stm32h7xx-hal/pull/256
+[257]: https://github.com/stm32-rs/stm32h7xx-hal/pull/257
+[261]: https://github.com/stm32-rs/stm32h7xx-hal/pull/261
+[262]: https://github.com/stm32-rs/stm32h7xx-hal/pull/262
+[264]: https://github.com/stm32-rs/stm32h7xx-hal/pull/264
+[267]: https://github.com/stm32-rs/stm32h7xx-hal/pull/267
+[269]: https://github.com/stm32-rs/stm32h7xx-hal/pull/269
+[284]: https://github.com/stm32-rs/stm32h7xx-hal/pull/284
+[287]: https://github.com/stm32-rs/stm32h7xx-hal/pull/287
+[292]: https://github.com/stm32-rs/stm32h7xx-hal/pull/292
+<<<<<<< HEAD
+=======
+[297]: https://github.com/stm32-rs/stm32h7xx-hal/pull/297
+>>>>>>> 566dfc4... Update CHANGELOG

Cargo.toml

@@ -1,6 +1,6 @@
 [package]
 name = "stm32h7xx-hal"
-version = "0.10.0"
+version = "0.11.0"
 authors = ["Andrew Straw <strawman@astraw.com>",
            "Richard Meadows <richard@richard.fish>",
            "Henrik Böving <hargonix@gmail.com>",
@@ -21,7 +21,7 @@ readme = "README.md"
 exclude = [".gitignore"]
 
 [package.metadata.docs.rs]
-features = ["stm32h743v", "xspi", "sdmmc", "fmc", "usb_hs", "rtc", "ethernet", "ltdc", "crc"]
+features = ["stm32h743v", "rt", "xspi", "sdmmc", "fmc", "usb_hs", "rtc", "ethernet", "ltdc", "crc", "rand"]
 targets = ["thumbv7em-none-eabihf"]
 
 [dependencies]

README.md

@@ -71,7 +71,7 @@ target device feature must be specified in the `Cargo.toml` file:
 [dependencies]
 cortex-m = "0.7.1"
 cortex-m-rt = "0.6.12"
-stm32h7xx-hal = {version = "0.10.0", features = ["stm32h743v","rt"]}
+stm32h7xx-hal = {version = "0.11.0", features = ["stm32h743v","rt"]}
 ```
 
 If you are unfamiliar with embedded development using Rust, there are

RELEASING.md

@@ -45,5 +45,5 @@ Checkout in a clean tree and publish
 ```
 cd [clean tree]
 git pull upstream
-cargo publish --features stm32h743,rt
+cargo publish --features stm32h743
 ```

src/dma/mod.rs

@@ -76,6 +76,10 @@
 //! ## Examples
 //!
 //! - [Memory to Memory Transfer](https://github.com/stm32-rs/stm32h7xx-hal/blob/master/examples/dma.rs)
+//! - [I2C Read using Basic DMA (BDMA)](https://github.com/stm32-rs/stm32h7xx-hal/blob/master/examples/i2c4_bdma.rs)
+//! - [Serial Transmit using DMA](https://github.com/stm32-rs/stm32h7xx-hal/blob/master/examples/serial-dma.rs)
+//! - [SPI using DMA](https://github.com/stm32-rs/stm32h7xx-hal/blob/master/examples/spi-dma.rs)
+//! - [SPI using DMA and the RTIC framework](https://github.com/stm32-rs/stm32h7xx-hal/blob/master/examples/spi-dma-rtic.rs)
 //! - [Memory to Memory Transfer using Master DMA(MDMA)](https://github.com/stm32-rs/stm32h7xx-hal/blob/master/examples/mdma.rs)
 //! - [Using MDMA with multiple beats per burst](https://github.com/stm32-rs/stm32h7xx-hal/blob/master/examples/mdma_bursts.rs)
 //!

src/lib.rs

@@ -45,7 +45,7 @@
 //!
 //! * [Direct Memory Access (DMA)](crate::dma)
 //! * [Cyclic Redundancy Check (CRC)](crate::crc) Feature gate `crc`
-//! * [Random Number Generator](crate::rng) ([rand_core::RngCore](rand_core::RngCore) is implemented under the`rand` feature gate)
+//! * [Random Number Generator](crate::rng) ([rand_core::RngCore](rand_core::RngCore) is implemented under the `rand` feature gate)
 //! * [System Window Watchdog](crate::watchdog)
 
 #![cfg_attr(not(test), no_std)]

src/sdmmc.rs

@@ -6,7 +6,7 @@
 //!
 //! # Examples
 //!
-//! - [SDMMC example applicatio](https://github.com/stm32-rs/stm32h7xx-hal/blob/master/examples/sdmmc.rs)
+//! - [SDMMC example application](https://github.com/stm32-rs/stm32h7xx-hal/blob/master/examples/sdmmc.rs)
 //!
 //! ## IO Setup
 //!

src/xspi/mod.rs

@@ -62,6 +62,7 @@
 //! ```
 //! use stm32h7xx_hal::xspi;
 //! let config = xspi::Config::new(12.mhz()).fifo_threshold(16);
+//! ```
 //!
 //! # Hyperbus
 //!