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run cargo fmt
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examples/ethernet-rtic-nucleo-h723zg.rs

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@@ -7,9 +7,9 @@
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//!
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//! The ethernet ring buffers are placed in AXI SRAM, where they can be
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//! accessed by both the core and the Ethernet DMA.
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//!
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//!
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//! Run like
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//!
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//!
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//! `cargo flash --example ethernet-rtic-nucleo-h723zg --features=ethernet,stm32h735 --chip=STM32H723ZGTx`
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#![deny(warnings)]
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#![no_main]
@@ -120,7 +120,7 @@ mod app {
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utilities::logger::init();
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// Initialise power...
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let pwr = ctx.device.PWR.constrain();
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let pwrcfg = pwr.ldo().freeze(); // nucleo-h723zg board doesn't have SMPS
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let pwrcfg = pwr.ldo().freeze(); // nucleo-h723zg board doesn't have SMPS
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// Initialise clocks...
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let rcc = ctx.device.RCC.constrain();

src/ethernet/eth.rs

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@@ -471,15 +471,13 @@ pub unsafe fn new_unchecked<const TD: usize, const RD: usize>(
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.modify(|_, w| w.eth1txen().set_bit().eth1rxen().set_bit());
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syscfg.pmcr.modify(|_, w| w.epis().bits(0b100)); // RMII
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}
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// reset ETH_MAC - write 1 then 0
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//rcc.ahb1rstr.modify(|_, w| w.eth1macrst().set_bit());
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//rcc.ahb1rstr.modify(|_, w| w.eth1macrst().clear_bit());
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cortex_m::interrupt::free(|_cs| {
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// 200 MHz
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eth_mac
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.mac1ustcr

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