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burrbullburrbull
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unmacro octospi
1 parent 7cccd8f commit 24e2847

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3 files changed

+382
-556
lines changed

3 files changed

+382
-556
lines changed

‎src/gpio/alt.rs

Lines changed: 50 additions & 44 deletions
Original file line numberDiff line numberDiff line change
@@ -1580,10 +1580,10 @@ pub mod mdios {
15801580
}
15811581

15821582
#[cfg(any(feature = "gpio-h72", feature = "gpio-h7a2"))]
1583-
pub mod octospim {
1583+
pub mod octospi1 {
15841584
use super::*;
15851585
pin! {
1586-
<P1Clk> for [
1586+
<Clk> for [
15871587
PB2<9>,
15881588
PF10<9>,
15891589

@@ -1593,7 +1593,11 @@ pub mod octospim {
15931593
#[cfg(feature = "gpio-h7a2")]
15941594
PA3<3>,
15951595
],
1596-
<P1Dqs> for [
1596+
<Nclk> for [
1597+
PB12<3>,
1598+
PF11<9>,
1599+
],
1600+
<Dqs> for [
15971601
PB2<10>,
15981602
PC5<10>,
15991603

@@ -1603,7 +1607,14 @@ pub mod octospim {
16031607
#[cfg(feature = "gpio-h7a2")]
16041608
PA1<11>,
16051609
],
1606-
<P1Io0> for [
1610+
<Ncs> for [
1611+
PB10<9>,
1612+
PB6<10>,
1613+
PC11<9>,
1614+
PE11<11>,
1615+
PG6<10>,
1616+
],
1617+
<Io0> for [
16071618
PC9<9>,
16081619
PD11<9>,
16091620
PF8<10>,
@@ -1620,7 +1631,7 @@ pub mod octospim {
16201631
#[cfg(feature = "gpio-h7a2")]
16211632
PC3<9>,
16221633
],
1623-
<P1Io1> for [
1634+
<Io1> for [
16241635
PC10<9>,
16251636
PD12<9>,
16261637
PF9<10>,
@@ -1631,7 +1642,7 @@ pub mod octospim {
16311642
#[cfg(feature = "gpio-h7a2")]
16321643
PB0<11>,
16331644
],
1634-
<P1Io2> for [
1645+
<Io2> for [
16351646
PA7<10>,
16361647
PE2<9>,
16371648
PF7<10>,
@@ -1644,88 +1655,95 @@ pub mod octospim {
16441655
#[cfg(feature = "gpio-h7a2")]
16451656
PC2<9>,
16461657
],
1647-
<P1Io3> for [
1658+
<Io3> for [
16481659
PA1<9>,
16491660
PA6<6>,
16501661
PD13<9>,
16511662
PF6<10>,
16521663
],
1653-
<P1Io4> for [
1664+
<Io4> for [
16541665
PC1<10>,
16551666
PD4<10>,
16561667
PE7<10>,
16571668
PH2<9>,
16581669
],
1659-
<P1Io5> for [
1670+
<Io5> for [
16601671
PD5<10>,
16611672
PE8<10>,
16621673
PH3<9>,
16631674
],
1664-
<P1Io6> for [
1675+
<Io6> for [
16651676
PD6<10>,
16661677
PE9<10>,
16671678
PG9<9>,
16681679
],
1669-
<P1Io7> for [
1680+
<Io7> for [
16701681
PD7<10>,
16711682
PE10<10>,
16721683
PG14<9>,
16731684
],
1674-
<P1Nclk> for [
1675-
PB12<3>,
1676-
PF11<9>,
1677-
],
1678-
<P1Ncs> for [
1679-
PB10<9>,
1680-
PB6<10>,
1681-
PC11<9>,
1682-
PE11<11>,
1683-
PG6<10>,
1684-
],
1685-
<P2Clk> for [
1685+
}
1686+
}
1687+
#[cfg(any(feature = "gpio-h72", feature = "gpio-h7a2"))]
1688+
pub mod octospi2 {
1689+
use super::*;
1690+
pin! {
1691+
<Clk> for [
16861692
PF4<9>,
16871693

16881694
#[cfg(feature = "gpio-h7a2")]
16891695
PI13<3>,
16901696
],
1691-
<P2Dqs> for [
1697+
<Nclk> for [
1698+
PF5<9>,
1699+
1700+
#[cfg(feature = "gpio-h7a2")]
1701+
PI14<3>,
1702+
],
1703+
<Dqs> for [
16921704
PF12<9>,
16931705
PG15<9>,
16941706
PG7<9>,
16951707

16961708
#[cfg(feature = "gpio-h7a2")]
16971709
PK6<3>,
16981710
],
1699-
<P2Io0> for [
1711+
<Ncs> for [
1712+
PG12<3>,
1713+
1714+
#[cfg(feature = "gpio-h7a2")]
1715+
PK5<3>,
1716+
],
1717+
<Io0> for [
17001718
PF0<9>,
17011719
#[cfg(feature = "gpio-h7a2")]
17021720
PI9<3>,
17031721
],
1704-
<P2Io1> for [
1722+
<Io1> for [
17051723
PF1<9>,
17061724

17071725
#[cfg(feature = "gpio-h7a2")]
17081726
PI10<3>,
17091727
],
1710-
<P2Io2> for [
1728+
<Io2> for [
17111729
PF2<9>,
17121730

17131731
#[cfg(feature = "gpio-h7a2")]
17141732
PI11<3>,
17151733
],
1716-
<P2Io3> for [
1734+
<Io3> for [
17171735
PF3<9>,
17181736

17191737
#[cfg(feature = "gpio-h7a2")]
17201738
PI12<3>,
17211739
],
1722-
<P2Io4> for [
1740+
<Io4> for [
17231741
PG0<9>,
17241742

17251743
#[cfg(feature = "gpio-h7a2")]
17261744
PJ1<3>,
17271745
],
1728-
<P2Io5> for [
1746+
<Io5> for [
17291747
PG1<9>,
17301748

17311749
#[cfg(feature = "gpio-h7a2")]
@@ -1734,7 +1752,7 @@ pub mod octospim {
17341752
#[cfg(feature = "gpio-h7a2")]
17351753
PJ2<3>,
17361754
],
1737-
<P2Io6> for [
1755+
<Io6> for [
17381756
PG10<3>,
17391757

17401758
#[cfg(feature = "gpio-h7a2")]
@@ -1743,24 +1761,12 @@ pub mod octospim {
17431761
#[cfg(feature = "gpio-h7a2")]
17441762
PK3<3>,
17451763
],
1746-
<P2Io7> for [
1764+
<Io7> for [
17471765
PG11<9>,
17481766

17491767
#[cfg(feature = "gpio-h7a2")]
17501768
PK4<3>,
17511769
],
1752-
<P2Nclk> for [
1753-
PF5<9>,
1754-
1755-
#[cfg(feature = "gpio-h7a2")]
1756-
PI14<3>,
1757-
],
1758-
<P2Ncs> for [
1759-
PG12<3>,
1760-
1761-
#[cfg(feature = "gpio-h7a2")]
1762-
PK5<3>,
1763-
],
17641770
}
17651771
}
17661772

‎src/xspi/mod.rs

Lines changed: 41 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -443,35 +443,7 @@ mod common {
443443
}
444444

445445
pub fn kernel_clk_unwrap(clocks: &CoreClocks) -> Hertz {
446-
#[cfg(not(feature = "rm0455"))]
447-
use stm32::rcc::d1ccipr as ccipr;
448-
#[cfg(feature = "rm0455")]
449-
use stm32::rcc::cdccipr as ccipr;
450-
451-
#[cfg(not(feature = "rm0455"))]
452-
let ccipr = unsafe { (*stm32::RCC::ptr()).d1ccipr.read() };
453-
#[cfg(feature = "rm0455")]
454-
let ccipr = unsafe { (*stm32::RCC::ptr()).cdccipr.read() };
455-
456-
match ccipr.$ccip().variant() {
457-
ccipr::[< $ccip:upper _A >]::RccHclk3 => clocks.hclk(),
458-
ccipr::[< $ccip:upper _A >]::Pll1Q => {
459-
clocks.pll1_q_ck().expect(
460-
concat!(stringify!($peripheral), ": PLL1_Q must be enabled")
461-
)
462-
}
463-
ccipr::[< $ccip:upper _A >]::Pll2R
464-
=> {
465-
clocks.pll2_r_ck().expect(
466-
concat!(stringify!($peripheral), ": PLL2_R must be enabled")
467-
)
468-
}
469-
ccipr::[< $ccip:upper _A >]::Per => {
470-
clocks.per_ck().expect(
471-
concat!(stringify!($peripheral), ": PER clock must be enabled")
472-
)
473-
}
474-
}
446+
<$peripheral as GetClk>::kernel_clk_unwrap(clocks)
475447
}
476448

477449
/// Configure the operational mode (number of bits) of the XSPI
@@ -920,7 +892,42 @@ mod common {
920892

921893
Ok(())
922894
}
923-
}}}
895+
}
896+
897+
impl GetClk for $peripheral {
898+
fn kernel_clk_unwrap(clocks: &CoreClocks) -> Hertz {
899+
#[cfg(not(feature = "rm0455"))]
900+
use stm32::rcc::d1ccipr as ccipr;
901+
#[cfg(feature = "rm0455")]
902+
use stm32::rcc::cdccipr as ccipr;
903+
904+
#[cfg(not(feature = "rm0455"))]
905+
let ccipr = unsafe { (*stm32::RCC::ptr()).d1ccipr.read() };
906+
#[cfg(feature = "rm0455")]
907+
let ccipr = unsafe { (*stm32::RCC::ptr()).cdccipr.read() };
908+
909+
match ccipr.$ccip().variant() {
910+
ccipr::[< $ccip:upper _A >]::RccHclk3 => clocks.hclk(),
911+
ccipr::[< $ccip:upper _A >]::Pll1Q => {
912+
clocks.pll1_q_ck().expect(
913+
concat!(stringify!($peripheral), ": PLL1_Q must be enabled")
914+
)
915+
}
916+
ccipr::[< $ccip:upper _A >]::Pll2R
917+
=> {
918+
clocks.pll2_r_ck().expect(
919+
concat!(stringify!($peripheral), ": PLL2_R must be enabled")
920+
)
921+
}
922+
ccipr::[< $ccip:upper _A >]::Per => {
923+
clocks.per_ck().expect(
924+
concat!(stringify!($peripheral), ": PER clock must be enabled")
925+
)
926+
}
927+
}
928+
}
929+
}
930+
}}
924931
}
925932

926933
#[cfg(any(feature = "rm0433", feature = "rm0399"))]
@@ -930,4 +937,8 @@ mod common {
930937
xspi_impl! { stm32::OCTOSPI1, rec::Octospi1, octospisel }
931938
#[cfg(any(feature = "rm0455", feature = "rm0468"))]
932939
xspi_impl! { stm32::OCTOSPI2, rec::Octospi2, octospisel }
940+
941+
pub trait GetClk {
942+
fn kernel_clk_unwrap(clocks: &CoreClocks) -> Hertz;
943+
}
933944
}

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