diff --git a/CHANGELOG.md b/CHANGELOG.md
index fef36c27..b1778295 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -9,6 +9,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ### Changed
 
+ - Support `u16` read/write for SPI
  - Use `bool` for BIDI mode type
  - `PwmHz::get_period`: fix computation of return value, prevent division by zero
  - apply #[inline] attribute to bitbanding functions [#517]
diff --git a/src/spi.rs b/src/spi.rs
index 0bac88fa..949c87c1 100644
--- a/src/spi.rs
+++ b/src/spi.rs
@@ -131,11 +131,32 @@ impl Ms for Master {
     const MSTR: bool = true;
 }
 
+pub trait FrameSize: Copy + Default {
+    const DFF: bool;
+}
+
+impl FrameSize for u8 {
+    const DFF: bool = false;
+}
+
+impl FrameSize for u16 {
+    const DFF: bool = true;
+}
+
+/// The bit format to send the data in
+#[derive(Debug, Clone, Copy, PartialEq, Eq)]
+pub enum BitFormat {
+    /// Least significant bit first
+    LsbFirst,
+    /// Most significant bit first
+    MsbFirst,
+}
+
 #[derive(Debug)]
-pub struct Spi<SPI, PINS, const BIDI: bool = false, OPERATION = Master> {
+pub struct Spi<SPI, PINS, const BIDI: bool = false, W = u8, OPERATION = Master> {
     spi: SPI,
     pins: PINS,
-    _operation: PhantomData<OPERATION>,
+    _operation: PhantomData<(W, OPERATION)>,
 }
 
 // Implemented by all SPI instances
@@ -149,8 +170,8 @@ pub trait Instance:
 // Implemented by all SPI instances
 macro_rules! spi {
     ($SPI:ty: $Spi:ident) => {
-        pub type $Spi<PINS, const BIDI: bool = false, OPERATION = Master> =
-            Spi<$SPI, PINS, BIDI, OPERATION>;
+        pub type $Spi<PINS, const BIDI: bool = false, W = u8, OPERATION = Master> =
+            Spi<$SPI, PINS, BIDI, W, OPERATION>;
 
         impl Instance for $SPI {
             fn ptr() -> *const spi1::RegisterBlock {
@@ -182,7 +203,7 @@ pub trait SpiExt: Sized + Instance {
         mode: impl Into<Mode>,
         freq: Hertz,
         clocks: &Clocks,
-    ) -> Spi<Self, (SCK, MISO, MOSI), false, Master>
+    ) -> Spi<Self, (SCK, MISO, MOSI), false, u8, Master>
     where
         (SCK, MISO, MOSI): Pins<Self>;
     fn spi_bidi<SCK, MISO, MOSI>(
@@ -191,7 +212,7 @@ pub trait SpiExt: Sized + Instance {
         mode: impl Into<Mode>,
         freq: Hertz,
         clocks: &Clocks,
-    ) -> Spi<Self, (SCK, MISO, MOSI), true, Master>
+    ) -> Spi<Self, (SCK, MISO, MOSI), true, u8, Master>
     where
         (SCK, MISO, MOSI): Pins<Self>;
     fn spi_slave<SCK, MISO, MOSI>(
@@ -200,7 +221,7 @@ pub trait SpiExt: Sized + Instance {
         mode: impl Into<Mode>,
         freq: Hertz,
         clocks: &Clocks,
-    ) -> Spi<Self, (SCK, MISO, MOSI), false, Slave>
+    ) -> Spi<Self, (SCK, MISO, MOSI), false, u8, Slave>
     where
         (SCK, MISO, MOSI): Pins<Self>;
     fn spi_bidi_slave<SCK, MISO, MOSI>(
@@ -209,7 +230,7 @@ pub trait SpiExt: Sized + Instance {
         mode: impl Into<Mode>,
         freq: Hertz,
         clocks: &Clocks,
-    ) -> Spi<Self, (SCK, MISO, MOSI), true, Slave>
+    ) -> Spi<Self, (SCK, MISO, MOSI), true, u8, Slave>
     where
         (SCK, MISO, MOSI): Pins<Self>;
 }
@@ -221,7 +242,7 @@ impl<SPI: Instance> SpiExt for SPI {
         mode: impl Into<Mode>,
         freq: Hertz,
         clocks: &Clocks,
-    ) -> Spi<Self, (SCK, MISO, MOSI), false, Master>
+    ) -> Spi<Self, (SCK, MISO, MOSI), false, u8, Master>
     where
         (SCK, MISO, MOSI): Pins<Self>,
     {
@@ -233,7 +254,7 @@ impl<SPI: Instance> SpiExt for SPI {
         mode: impl Into<Mode>,
         freq: Hertz,
         clocks: &Clocks,
-    ) -> Spi<Self, (SCK, MISO, MOSI), true, Master>
+    ) -> Spi<Self, (SCK, MISO, MOSI), true, u8, Master>
     where
         (SCK, MISO, MOSI): Pins<Self>,
     {
@@ -245,7 +266,7 @@ impl<SPI: Instance> SpiExt for SPI {
         mode: impl Into<Mode>,
         freq: Hertz,
         clocks: &Clocks,
-    ) -> Spi<Self, (SCK, MISO, MOSI), false, Slave>
+    ) -> Spi<Self, (SCK, MISO, MOSI), false, u8, Slave>
     where
         (SCK, MISO, MOSI): Pins<Self>,
     {
@@ -257,7 +278,7 @@ impl<SPI: Instance> SpiExt for SPI {
         mode: impl Into<Mode>,
         freq: Hertz,
         clocks: &Clocks,
-    ) -> Spi<Self, (SCK, MISO, MOSI), true, Slave>
+    ) -> Spi<Self, (SCK, MISO, MOSI), true, u8, Slave>
     where
         (SCK, MISO, MOSI): Pins<Self>,
     {
@@ -265,7 +286,9 @@ impl<SPI: Instance> SpiExt for SPI {
     }
 }
 
-impl<SPI: Instance, PINS, const BIDI: bool, OPERATION: Ms> Spi<SPI, PINS, BIDI, OPERATION> {
+impl<SPI: Instance, PINS, const BIDI: bool, W: FrameSize, OPERATION: Ms>
+    Spi<SPI, PINS, BIDI, W, OPERATION>
+{
     pub fn init(self) -> Self {
         self.spi.cr1.modify(|_, w| {
             // bidimode: 2-line or 1-line unidirectional
@@ -273,6 +296,8 @@ impl<SPI: Instance, PINS, const BIDI: bool, OPERATION: Ms> Spi<SPI, PINS, BIDI,
             w.bidioe().bit(BIDI);
             // master/slave mode
             w.mstr().bit(OPERATION::MSTR);
+            // data frame size
+            w.dff().bit(W::DFF);
             // spe: enable the SPI bus
             w.spe().set_bit()
         });
@@ -281,31 +306,51 @@ impl<SPI: Instance, PINS, const BIDI: bool, OPERATION: Ms> Spi<SPI, PINS, BIDI,
     }
 }
 
-impl<SPI: Instance, PINS, OPERATION: Ms> Spi<SPI, PINS, false, OPERATION> {
-    pub fn to_bidi_transfer_mode(self) -> Spi<SPI, PINS, true, OPERATION> {
+impl<SPI: Instance, PINS, W: FrameSize, OPERATION: Ms> Spi<SPI, PINS, false, W, OPERATION> {
+    pub fn to_bidi_transfer_mode(self) -> Spi<SPI, PINS, true, W, OPERATION> {
+        self.into_mode()
+    }
+}
+
+impl<SPI: Instance, PINS, W: FrameSize, OPERATION: Ms> Spi<SPI, PINS, true, W, OPERATION> {
+    pub fn to_normal_transfer_mode(self) -> Spi<SPI, PINS, false, W, OPERATION> {
+        self.into_mode()
+    }
+}
+
+impl<SPI: Instance, PINS, const BIDI: bool, W: FrameSize> Spi<SPI, PINS, BIDI, W, Master> {
+    pub fn to_slave_operation(self) -> Spi<SPI, PINS, BIDI, W, Slave> {
         self.into_mode()
     }
 }
 
-impl<SPI: Instance, PINS, OPERATION: Ms> Spi<SPI, PINS, true, OPERATION> {
-    pub fn to_normal_transfer_mode(self) -> Spi<SPI, PINS, false, OPERATION> {
+impl<SPI: Instance, PINS, const BIDI: bool, W: FrameSize> Spi<SPI, PINS, BIDI, W, Slave> {
+    pub fn to_master_operation(self) -> Spi<SPI, PINS, BIDI, W, Master> {
         self.into_mode()
     }
 }
 
-impl<SPI: Instance, PINS, const BIDI: bool> Spi<SPI, PINS, BIDI, Master> {
-    pub fn to_slave_operation(self) -> Spi<SPI, PINS, BIDI, Slave> {
+impl<SPI, PINS, const BIDI: bool, OPERATION: Ms> Spi<SPI, PINS, BIDI, u8, OPERATION>
+where
+    SPI: Instance,
+{
+    /// Converts from 8bit dataframe to 16bit.
+    pub fn frame_size_16bit(self) -> Spi<SPI, PINS, BIDI, u16, OPERATION> {
         self.into_mode()
     }
 }
 
-impl<SPI: Instance, PINS, const BIDI: bool> Spi<SPI, PINS, BIDI, Slave> {
-    pub fn to_master_operation(self) -> Spi<SPI, PINS, BIDI, Master> {
+impl<SPI, PINS, const BIDI: bool, OPERATION: Ms> Spi<SPI, PINS, BIDI, u16, OPERATION>
+where
+    SPI: Instance,
+{
+    /// Converts from 16bit dataframe to 8bit.
+    pub fn frame_size_8bit(self) -> Spi<SPI, PINS, BIDI, u8, OPERATION> {
         self.into_mode()
     }
 }
 
-impl<SPI: Instance, SCK, MISO, MOSI> Spi<SPI, (SCK, MISO, MOSI), false, Master> {
+impl<SPI: Instance, SCK, MISO, MOSI> Spi<SPI, (SCK, MISO, MOSI), false, u8, Master> {
     pub fn new(
         spi: SPI,
         mut pins: (SCK, MISO, MOSI),
@@ -331,7 +376,7 @@ impl<SPI: Instance, SCK, MISO, MOSI> Spi<SPI, (SCK, MISO, MOSI), false, Master>
     }
 }
 
-impl<SPI: Instance, SCK, MISO, MOSI> Spi<SPI, (SCK, MISO, MOSI), true, Master> {
+impl<SPI: Instance, SCK, MISO, MOSI> Spi<SPI, (SCK, MISO, MOSI), true, u8, Master> {
     pub fn new_bidi(
         spi: SPI,
         mut pins: (SCK, MISO, MOSI),
@@ -357,7 +402,7 @@ impl<SPI: Instance, SCK, MISO, MOSI> Spi<SPI, (SCK, MISO, MOSI), true, Master> {
     }
 }
 
-impl<SPI: Instance, SCK, MISO, MOSI> Spi<SPI, (SCK, MISO, MOSI), false, Slave> {
+impl<SPI: Instance, SCK, MISO, MOSI> Spi<SPI, (SCK, MISO, MOSI), false, u8, Slave> {
     pub fn new_slave(
         spi: SPI,
         mut pins: (SCK, MISO, MOSI),
@@ -383,7 +428,7 @@ impl<SPI: Instance, SCK, MISO, MOSI> Spi<SPI, (SCK, MISO, MOSI), false, Slave> {
     }
 }
 
-impl<SPI: Instance, SCK, MISO, MOSI> Spi<SPI, (SCK, MISO, MOSI), true, Slave> {
+impl<SPI: Instance, SCK, MISO, MOSI> Spi<SPI, (SCK, MISO, MOSI), true, u8, Slave> {
     pub fn new_bidi_slave(
         spi: SPI,
         mut pins: (SCK, MISO, MOSI),
@@ -421,7 +466,7 @@ where
     }
 }
 
-impl<SPI: Instance, PINS, const BIDI: bool, OPERATION> Spi<SPI, PINS, BIDI, OPERATION> {
+impl<SPI: Instance, PINS, const BIDI: bool, W, OPERATION> Spi<SPI, PINS, BIDI, W, OPERATION> {
     fn _new(spi: SPI, pins: PINS) -> Self {
         Self {
             spi,
@@ -431,7 +476,9 @@ impl<SPI: Instance, PINS, const BIDI: bool, OPERATION> Spi<SPI, PINS, BIDI, OPER
     }
 
     /// Convert the spi to another mode.
-    fn into_mode<const BIDI2: bool, OPERATION2: Ms>(self) -> Spi<SPI, PINS, BIDI2, OPERATION2> {
+    fn into_mode<const BIDI2: bool, W2: FrameSize, OPERATION2: Ms>(
+        self,
+    ) -> Spi<SPI, PINS, BIDI2, W2, OPERATION2> {
         let mut spi = Spi::_new(self.spi, self.pins);
         spi.enable(false);
         spi.init()
@@ -482,6 +529,14 @@ impl<SPI: Instance, PINS, const BIDI: bool, OPERATION> Spi<SPI, PINS, BIDI, OPER
         self
     }
 
+    /// Select which frame format is used for data transfers
+    pub fn bit_format(&mut self, format: BitFormat) {
+        match format {
+            BitFormat::LsbFirst => self.spi.cr1.modify(|_, w| w.lsbfirst().set_bit()),
+            BitFormat::MsbFirst => self.spi.cr1.modify(|_, w| w.lsbfirst().clear_bit()),
+        }
+    }
+
     /// Enable interrupts for the given `event`:
     ///  - Received data ready to be read (RXNE)
     ///  - Transmit data register empty (TXE)
@@ -550,13 +605,36 @@ impl<SPI: Instance, PINS, const BIDI: bool, OPERATION> Spi<SPI, PINS, BIDI, OPER
     pub fn is_overrun(&self) -> bool {
         self.spi.sr.read().ovr().bit_is_set()
     }
+}
 
-    pub fn use_dma(self) -> DmaBuilder<SPI> {
-        DmaBuilder { spi: self.spi }
+trait ReadWriteReg<W> {
+    fn read_data_reg(&mut self) -> W;
+    fn write_data_reg(&mut self, data: W);
+}
+
+impl<SPI, PINS, const BIDI: bool, W, OPERATION> ReadWriteReg<W>
+    for Spi<SPI, PINS, BIDI, W, OPERATION>
+where
+    SPI: Instance,
+    W: FrameSize,
+{
+    fn read_data_reg(&mut self) -> W {
+        // NOTE(read_volatile) read only 1 byte (the svd2rust API only allows
+        // reading a half-word)
+        unsafe { ptr::read_volatile(&self.spi.dr as *const _ as *const W) }
     }
 
+    fn write_data_reg(&mut self, data: W) {
+        // NOTE(write_volatile) see note above
+        unsafe { ptr::write_volatile(&self.spi.dr as *const _ as *mut W, data) }
+    }
+}
+
+impl<SPI: Instance, PINS, const BIDI: bool, W: FrameSize, OPERATION>
+    Spi<SPI, PINS, BIDI, W, OPERATION>
+{
     #[inline(always)]
-    fn check_read(&mut self) -> nb::Result<u8, Error> {
+    fn check_read(&mut self) -> nb::Result<W, Error> {
         let sr = self.spi.sr.read();
 
         Err(if sr.ovr().bit_is_set() {
@@ -566,14 +644,14 @@ impl<SPI: Instance, PINS, const BIDI: bool, OPERATION> Spi<SPI, PINS, BIDI, OPER
         } else if sr.crcerr().bit_is_set() {
             Error::Crc.into()
         } else if sr.rxne().bit_is_set() {
-            return Ok(self.read_u8());
+            return Ok(self.read_data_reg());
         } else {
             nb::Error::WouldBlock
         })
     }
 
     #[inline(always)]
-    fn check_send(&mut self, byte: u8) -> nb::Result<(), Error> {
+    fn check_send(&mut self, byte: W) -> nb::Result<(), Error> {
         let sr = self.spi.sr.read();
 
         Err(if sr.ovr().bit_is_set() {
@@ -592,23 +670,19 @@ impl<SPI: Instance, PINS, const BIDI: bool, OPERATION> Spi<SPI, PINS, BIDI, OPER
             });
             Error::Crc.into()
         } else if sr.txe().bit_is_set() {
-            self.send_u8(byte);
+            self.write_data_reg(byte);
             return Ok(());
         } else {
             nb::Error::WouldBlock
         })
     }
+}
 
-    #[inline(always)]
-    fn read_u8(&mut self) -> u8 {
-        // NOTE(read_volatile) read only 1 byte (the svd2rust API only allows reading a half-word)
-        unsafe { ptr::read_volatile(&self.spi.dr as *const _ as *const u8) }
-    }
+// Spi DMA
 
-    #[inline(always)]
-    fn send_u8(&mut self, byte: u8) {
-        // NOTE(write_volatile) see note above
-        unsafe { ptr::write_volatile(&self.spi.dr as *const _ as *mut u8, byte) }
+impl<SPI: Instance, PINS, const BIDI: bool> Spi<SPI, PINS, BIDI, u8, Master> {
+    pub fn use_dma(self) -> DmaBuilder<SPI> {
+        DmaBuilder { spi: self.spi }
     }
 }
 
diff --git a/src/spi/hal_02.rs b/src/spi/hal_02.rs
index bf183f3f..b91e6de3 100644
--- a/src/spi/hal_02.rs
+++ b/src/spi/hal_02.rs
@@ -28,23 +28,23 @@ impl From<Mode> for super::Mode {
 }
 
 mod nb {
-    use super::super::{Error, Instance, Spi};
+    use super::super::{Error, FrameSize, Instance, Spi};
     use embedded_hal::spi::FullDuplex;
 
-    impl<SPI, PINS, const BIDI: bool> FullDuplex<u8> for Spi<SPI, PINS, BIDI>
+    impl<SPI, PINS, const BIDI: bool, W: FrameSize> FullDuplex<W> for Spi<SPI, PINS, BIDI, W>
     where
         SPI: Instance,
     {
         type Error = Error;
 
-        fn read(&mut self) -> nb::Result<u8, Error> {
+        fn read(&mut self) -> nb::Result<W, Error> {
             if BIDI {
                 self.spi.cr1.modify(|_, w| w.bidioe().clear_bit());
             }
             self.check_read()
         }
 
-        fn send(&mut self, byte: u8) -> nb::Result<(), Error> {
+        fn send(&mut self, byte: W) -> nb::Result<(), Error> {
             if BIDI {
                 self.spi.cr1.modify(|_, w| w.bidioe().set_bit());
             }
@@ -58,7 +58,7 @@ mod blocking {
     use embedded_hal::blocking::spi::{Operation, Transactional, Transfer, Write, WriteIter};
     use embedded_hal::spi::FullDuplex;
 
-    impl<SPI, PINS, const BIDI: bool> Transfer<u8> for Spi<SPI, PINS, BIDI>
+    impl<SPI, PINS, const BIDI: bool> Transfer<u8> for Spi<SPI, PINS, BIDI, u8>
     where
         SPI: Instance,
     {
@@ -74,7 +74,23 @@ mod blocking {
         }
     }
 
-    impl<SPI, PINS, const BIDI: bool> Write<u8> for Spi<SPI, PINS, BIDI>
+    impl<SPI, PINS, const BIDI: bool> Transfer<u16> for Spi<SPI, PINS, BIDI, u16>
+    where
+        SPI: Instance,
+    {
+        type Error = Error;
+
+        fn transfer<'w>(&mut self, words: &'w mut [u16]) -> Result<&'w [u16], Self::Error> {
+            for word in words.iter_mut() {
+                nb::block!(self.send(*word))?;
+                *word = nb::block!(self.read())?;
+            }
+
+            Ok(words)
+        }
+    }
+
+    impl<SPI, PINS, const BIDI: bool> Write<u8> for Spi<SPI, PINS, BIDI, u8>
     where
         SPI: Instance,
     {
@@ -85,7 +101,7 @@ mod blocking {
         }
     }
 
-    impl<SPI, PINS, const BIDI: bool> WriteIter<u8> for Spi<SPI, PINS, BIDI>
+    impl<SPI, PINS, const BIDI: bool> WriteIter<u8> for Spi<SPI, PINS, BIDI, u8>
     where
         SPI: Instance,
     {
@@ -106,13 +122,46 @@ mod blocking {
         }
     }
 
-    impl<SPI, PINS, const BIDI: bool> Transactional<u8> for Spi<SPI, PINS, BIDI>
+    impl<SPI, PINS, const BIDI: bool> Write<u16> for Spi<SPI, PINS, BIDI, u16>
+    where
+        SPI: Instance,
+    {
+        type Error = Error;
+
+        fn write(&mut self, words: &[u16]) -> Result<(), Self::Error> {
+            self.write_iter(words.iter().copied())
+        }
+    }
+
+    impl<SPI, PINS, const BIDI: bool> WriteIter<u16> for Spi<SPI, PINS, BIDI, u16>
+    where
+        SPI: Instance,
+    {
+        type Error = Error;
+
+        fn write_iter<WI>(&mut self, words: WI) -> Result<(), Self::Error>
+        where
+            WI: IntoIterator<Item = u16>,
+        {
+            for word in words.into_iter() {
+                nb::block!(self.send(word))?;
+                if !BIDI {
+                    nb::block!(self.read())?;
+                }
+            }
+
+            Ok(())
+        }
+    }
+
+    impl<SPI, PINS, const BIDI: bool, W: Copy + 'static> Transactional<W> for Spi<SPI, PINS, BIDI, W>
     where
+        Self: Transfer<W, Error = Error> + Write<W, Error = Error>,
         SPI: Instance,
     {
         type Error = Error;
 
-        fn exec<'a>(&mut self, operations: &mut [Operation<'a, u8>]) -> Result<(), Error> {
+        fn exec<'a>(&mut self, operations: &mut [Operation<'a, W>]) -> Result<(), Error> {
             for op in operations {
                 match op {
                     Operation::Write(w) => self.write(w)?,
diff --git a/src/spi/hal_1.rs b/src/spi/hal_1.rs
index c08ce0aa..a2860dcb 100644
--- a/src/spi/hal_1.rs
+++ b/src/spi/hal_1.rs
@@ -37,26 +37,26 @@ impl Error for super::Error {
     }
 }
 
-impl<SPI, PINS, const BIDI: bool> ErrorType for super::Spi<SPI, PINS, BIDI> {
+impl<SPI, PINS, const BIDI: bool, W> ErrorType for super::Spi<SPI, PINS, BIDI, W> {
     type Error = super::Error;
 }
 
 mod nb {
-    use super::super::{Error, Instance, Spi};
+    use super::super::{Error, FrameSize, Instance, Spi};
     use embedded_hal_one::spi::nb::FullDuplex;
 
-    impl<SPI, PINS, const BIDI: bool> FullDuplex<u8> for Spi<SPI, PINS, BIDI>
+    impl<SPI, PINS, const BIDI: bool, W: FrameSize> FullDuplex<W> for Spi<SPI, PINS, BIDI, W>
     where
         SPI: Instance,
     {
-        fn read(&mut self) -> nb::Result<u8, Error> {
+        fn read(&mut self) -> nb::Result<W, Error> {
             if BIDI {
                 self.spi.cr1.modify(|_, w| w.bidioe().clear_bit());
             }
             self.check_read()
         }
 
-        fn write(&mut self, byte: u8) -> nb::Result<(), Error> {
+        fn write(&mut self, byte: W) -> nb::Result<(), Error> {
             if BIDI {
                 self.spi.cr1.modify(|_, w| w.bidioe().set_bit());
             }
@@ -66,15 +66,14 @@ mod nb {
 }
 
 mod blocking {
-    use super::super::{Error, Instance, Spi};
+    use super::super::{FrameSize, Instance, Spi};
     use embedded_hal_one::spi::{
         blocking::{SpiBus, SpiBusFlush, SpiBusRead, SpiBusWrite},
         nb::FullDuplex,
     };
 
-    impl<SPI, PINS, const BIDI: bool, W: Copy + Default + 'static> SpiBus<W> for Spi<SPI, PINS, BIDI>
+    impl<SPI, PINS, const BIDI: bool, W: FrameSize + 'static> SpiBus<W> for Spi<SPI, PINS, BIDI, W>
     where
-        Self: FullDuplex<W, Error = Error> + SpiBusWrite<W>,
         SPI: Instance,
     {
         fn transfer_in_place(&mut self, words: &mut [W]) -> Result<(), Self::Error> {
@@ -98,7 +97,7 @@ mod blocking {
         }
     }
 
-    impl<SPI, PINS, const BIDI: bool> SpiBusFlush for Spi<SPI, PINS, BIDI>
+    impl<SPI, PINS, const BIDI: bool, W> SpiBusFlush for Spi<SPI, PINS, BIDI, W>
     where
         SPI: Instance,
     {
@@ -107,9 +106,8 @@ mod blocking {
         }
     }
 
-    impl<SPI, PINS, const BIDI: bool, W: Copy + 'static> SpiBusWrite<W> for Spi<SPI, PINS, BIDI>
+    impl<SPI, PINS, const BIDI: bool, W: FrameSize + 'static> SpiBusWrite<W> for Spi<SPI, PINS, BIDI, W>
     where
-        Self: FullDuplex<W, Error = Error>,
         SPI: Instance,
     {
         fn write(&mut self, words: &[W]) -> Result<(), Self::Error> {
@@ -124,10 +122,8 @@ mod blocking {
         }
     }
 
-    impl<SPI, PINS, const BIDI: bool, W: Copy + Default + 'static> SpiBusRead<W>
-        for Spi<SPI, PINS, BIDI>
+    impl<SPI, PINS, const BIDI: bool, W: FrameSize + 'static> SpiBusRead<W> for Spi<SPI, PINS, BIDI, W>
     where
-        Self: FullDuplex<W, Error = Error>,
         SPI: Instance,
     {
         fn read(&mut self, words: &mut [W]) -> Result<(), Self::Error> {