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into_mode, cleanups
1 parent 18fb1de commit f1b674c

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4 files changed

+47
-36
lines changed

4 files changed

+47
-36
lines changed

examples/st7789-lcd.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -75,7 +75,7 @@ fn main() -> ! {
7575
chip_select: ChipSelect1(gpiod.pd7.into_alternate()),
7676
};
7777
let lcd_reset = gpiod.pd11.into_push_pull_output();
78-
let mut backlight_control = gpiof.pf5.into_push_pull_output();
78+
let backlight_control = gpiof.pf5.into_push_pull_output();
7979

8080
// Speed up timing settings, assuming HCLK is 100 MHz (1 cycle = 10 nanoseconds)
8181
// These read timings work to read settings, but slower timings are needed to read from the

src/spi.rs

Lines changed: 41 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -119,6 +119,18 @@ pub struct Master;
119119
/// Spi in Slave mode (type state)
120120
pub struct Slave;
121121

122+
pub trait Ms {
123+
const MSTR: bool;
124+
}
125+
126+
impl Ms for Slave {
127+
const MSTR: bool = false;
128+
}
129+
130+
impl Ms for Master {
131+
const MSTR: bool = true;
132+
}
133+
122134
#[derive(Debug)]
123135
pub struct Spi<SPI, PINS, const BIDI: bool = false, OPERATION = Master> {
124136
spi: SPI,
@@ -253,12 +265,14 @@ impl<SPI: Instance> SpiExt for SPI {
253265
}
254266
}
255267

256-
impl<SPI: Instance, PINS, const BIDI: bool, OPERATION> Spi<SPI, PINS, BIDI, OPERATION> {
268+
impl<SPI: Instance, PINS, const BIDI: bool, OPERATION: Ms> Spi<SPI, PINS, BIDI, OPERATION> {
257269
pub fn init(self) -> Self {
258270
self.spi.cr1.modify(|_, w| {
259271
// bidimode: 2-line or 1-line unidirectional
260272
w.bidimode().bit(BIDI);
261273
w.bidioe().bit(BIDI);
274+
// master/slave mode
275+
w.mstr().bit(OPERATION::MSTR);
262276
// spe: enable the SPI bus
263277
w.spe().set_bit()
264278
});
@@ -267,35 +281,27 @@ impl<SPI: Instance, PINS, const BIDI: bool, OPERATION> Spi<SPI, PINS, BIDI, OPER
267281
}
268282
}
269283

270-
impl<SPI: Instance, PINS, OPERATION> Spi<SPI, PINS, false, OPERATION> {
284+
impl<SPI: Instance, PINS, OPERATION: Ms> Spi<SPI, PINS, false, OPERATION> {
271285
pub fn to_bidi_transfer_mode(self) -> Spi<SPI, PINS, true, OPERATION> {
272-
let mut dev_w_new_t_mode = self.into_mode::<true>();
273-
dev_w_new_t_mode.enable(false);
274-
dev_w_new_t_mode.init()
286+
self.into_mode()
275287
}
276288
}
277289

278-
impl<SPI: Instance, PINS, OPERATION> Spi<SPI, PINS, true, OPERATION> {
290+
impl<SPI: Instance, PINS, OPERATION: Ms> Spi<SPI, PINS, true, OPERATION> {
279291
pub fn to_normal_transfer_mode(self) -> Spi<SPI, PINS, false, OPERATION> {
280-
let mut dev_w_new_t_mode = self.into_mode::<false>();
281-
dev_w_new_t_mode.enable(false);
282-
dev_w_new_t_mode.init()
292+
self.into_mode()
283293
}
284294
}
285295

286296
impl<SPI: Instance, PINS, const BIDI: bool> Spi<SPI, PINS, BIDI, Master> {
287297
pub fn to_slave_operation(self) -> Spi<SPI, PINS, BIDI, Slave> {
288-
let mut dev_w_new_operation = self.into_operation::<Slave>();
289-
dev_w_new_operation.enable(false);
290-
dev_w_new_operation.init()
298+
self.into_mode()
291299
}
292300
}
293301

294302
impl<SPI: Instance, PINS, const BIDI: bool> Spi<SPI, PINS, BIDI, Slave> {
295303
pub fn to_master_operation(self) -> Spi<SPI, PINS, BIDI, Master> {
296-
let mut dev_w_new_operation = self.into_operation::<Master>();
297-
dev_w_new_operation.enable(false);
298-
dev_w_new_operation.init()
304+
self.into_mode()
299305
}
300306
}
301307

@@ -424,14 +430,11 @@ impl<SPI: Instance, PINS, const BIDI: bool, OPERATION> Spi<SPI, PINS, BIDI, OPER
424430
}
425431
}
426432

427-
/// Convert the spi to another transfer mode.
428-
fn into_mode<const BIDI2: bool>(self) -> Spi<SPI, PINS, BIDI2, OPERATION> {
429-
Spi::_new(self.spi, self.pins)
430-
}
431-
432-
/// Convert the spi to another operation mode.
433-
fn into_operation<OPERATION2>(self) -> Spi<SPI, PINS, BIDI, OPERATION2> {
434-
Spi::_new(self.spi, self.pins)
433+
/// Convert the spi to another mode.
434+
fn into_mode<const BIDI2: bool, OPERATION2: Ms>(self) -> Spi<SPI, PINS, BIDI2, OPERATION2> {
435+
let mut spi = Spi::_new(self.spi, self.pins);
436+
spi.enable(false);
437+
spi.init()
435438
}
436439

437440
/// Enable/disable spi
@@ -505,18 +508,32 @@ impl<SPI: Instance, PINS, const BIDI: bool, OPERATION> Spi<SPI, PINS, BIDI, OPER
505508

506509
/// Return `true` if the TXE flag is set, i.e. new data to transmit
507510
/// can be written to the SPI.
511+
#[inline]
508512
pub fn is_tx_empty(&self) -> bool {
509513
self.spi.sr.read().txe().bit_is_set()
510514
}
515+
#[inline]
516+
#[deprecated(since = "0.14.0", note = "please use `is_tx_empty` instead")]
517+
pub fn is_txe(&self) -> bool {
518+
self.is_tx_empty()
519+
}
511520

512521
/// Return `true` if the RXNE flag is set, i.e. new data has been received
513522
/// and can be read from the SPI.
523+
#[inline]
514524
pub fn is_rx_not_empty(&self) -> bool {
515525
self.spi.sr.read().rxne().bit_is_set()
516526
}
517527

528+
#[inline]
529+
#[deprecated(since = "0.14.0", note = "please use `is_rx_not_empty` instead")]
530+
pub fn is_rxne(&self) -> bool {
531+
self.is_rx_not_empty()
532+
}
533+
518534
/// Return `true` if the MODF flag is set, i.e. the SPI has experienced a
519535
/// Master Mode Fault. (see chapter 28.3.10 of the STM32F4 Reference Manual)
536+
#[inline]
520537
pub fn is_modf(&self) -> bool {
521538
self.spi.sr.read().modf().bit_is_set()
522539
}
@@ -529,6 +546,7 @@ impl<SPI: Instance, PINS, const BIDI: bool, OPERATION> Spi<SPI, PINS, BIDI, OPER
529546

530547
/// Return `true` if the OVR flag is set, i.e. new data has been received
531548
/// while the receive data register was already filled.
549+
#[inline]
532550
pub fn is_overrun(&self) -> bool {
533551
self.spi.sr.read().ovr().bit_is_set()
534552
}

src/spi/hal_02.rs

Lines changed: 1 addition & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -81,14 +81,7 @@ mod blocking {
8181
type Error = Error;
8282

8383
fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> {
84-
for word in words {
85-
nb::block!(self.send(*word))?;
86-
if !BIDI {
87-
nb::block!(self.read())?;
88-
}
89-
}
90-
91-
Ok(())
84+
self.write_iter(words.iter().copied())
9285
}
9386
}
9487

src/spi/hal_1.rs

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -78,7 +78,7 @@ mod blocking {
7878
SPI: Instance,
7979
{
8080
fn transfer_in_place(&mut self, words: &mut [W]) -> Result<(), Self::Error> {
81-
for word in words.iter_mut() {
81+
for word in words {
8282
nb::block!(<Self as FullDuplex<W>>::write(self, *word))?;
8383
*word = nb::block!(<Self as FullDuplex<W>>::read(self))?;
8484
}
@@ -89,9 +89,9 @@ mod blocking {
8989
fn transfer(&mut self, buff: &mut [W], data: &[W]) -> Result<(), Self::Error> {
9090
assert_eq!(data.len(), buff.len());
9191

92-
for i in 0..data.len() {
93-
nb::block!(<Self as FullDuplex<W>>::write(self, data[i]))?;
94-
buff[i] = nb::block!(<Self as FullDuplex<W>>::read(self))?;
92+
for (d, b) in data.iter().cloned().zip(buff.iter_mut()) {
93+
nb::block!(<Self as FullDuplex<W>>::write(self, d))?;
94+
*b = nb::block!(<Self as FullDuplex<W>>::read(self))?;
9595
}
9696

9797
Ok(())

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