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mvirkkunenmvirkkunen
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chore: reformat
1 parent 673ec82 commit e17cd97

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+44
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‎src/gpio.rs

Lines changed: 44 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -103,22 +103,22 @@ macro_rules! exti_erased {
103103
syscfg.exticr1.modify(|r, w| unsafe {
104104
w.bits((r.bits() & !(0xf << offset)) | ($extigpionr << offset))
105105
});
106-
},
106+
}
107107
4..=7 => {
108108
syscfg.exticr2.modify(|r, w| unsafe {
109109
w.bits((r.bits() & !(0xf << offset)) | ($extigpionr << offset))
110110
});
111-
},
111+
}
112112
8..=11 => {
113113
syscfg.exticr3.modify(|r, w| unsafe {
114114
w.bits((r.bits() & !(0xf << offset)) | ($extigpionr << offset))
115115
});
116-
},
116+
}
117117
12..=15 => {
118118
syscfg.exticr4.modify(|r, w| unsafe {
119119
w.bits((r.bits() & !(0xf << offset)) | ($extigpionr << offset))
120120
});
121-
},
121+
}
122122
_ => {}
123123
}
124124
}
@@ -127,36 +127,44 @@ macro_rules! exti_erased {
127127
fn trigger_on_edge(&mut self, exti: &mut EXTI, edge: Edge) {
128128
match edge {
129129
Edge::RISING => {
130-
exti.rtsr.modify(|r, w| unsafe { w.bits(r.bits() | (1 << self.i)) });
131-
exti.ftsr.modify(|r, w| unsafe { w.bits(r.bits() & !(1 << self.i)) });
132-
},
130+
exti.rtsr
131+
.modify(|r, w| unsafe { w.bits(r.bits() | (1 << self.i)) });
132+
exti.ftsr
133+
.modify(|r, w| unsafe { w.bits(r.bits() & !(1 << self.i)) });
134+
}
133135
Edge::FALLING => {
134-
exti.ftsr.modify(|r, w| unsafe { w.bits(r.bits() | (1 << self.i)) });
135-
exti.rtsr.modify(|r, w| unsafe { w.bits(r.bits() & !(1 << self.i)) });
136-
},
136+
exti.ftsr
137+
.modify(|r, w| unsafe { w.bits(r.bits() | (1 << self.i)) });
138+
exti.rtsr
139+
.modify(|r, w| unsafe { w.bits(r.bits() & !(1 << self.i)) });
140+
}
137141
Edge::RISING_FALLING => {
138-
exti.rtsr.modify(|r, w| unsafe { w.bits(r.bits() | (1 << self.i)) });
139-
exti.ftsr.modify(|r, w| unsafe { w.bits(r.bits() | (1 << self.i)) });
142+
exti.rtsr
143+
.modify(|r, w| unsafe { w.bits(r.bits() | (1 << self.i)) });
144+
exti.ftsr
145+
.modify(|r, w| unsafe { w.bits(r.bits() | (1 << self.i)) });
140146
}
141147
}
142148
}
143149

144150
/// Enable external interrupts from this pin.
145151
fn enable_interrupt(&mut self, exti: &mut EXTI) {
146-
exti.imr.modify(|r, w| unsafe { w.bits(r.bits() | (1 << self.i)) });
152+
exti.imr
153+
.modify(|r, w| unsafe { w.bits(r.bits() | (1 << self.i)) });
147154
}
148155

149156
/// Disable external interrupts from this pin
150157
fn disable_interrupt(&mut self, exti: &mut EXTI) {
151-
exti.imr.modify(|r, w| unsafe { w.bits(r.bits() & !(1 << self.i)) });
158+
exti.imr
159+
.modify(|r, w| unsafe { w.bits(r.bits() & !(1 << self.i)) });
152160
}
153161

154162
/// Clear the interrupt pending bit for this pin
155163
fn clear_interrupt_pending_bit(&mut self) {
156-
unsafe { (*EXTI::ptr()).pr.write(|w| w.bits(1 << self.i) ) };
164+
unsafe { (*EXTI::ptr()).pr.write(|w| w.bits(1 << self.i)) };
157165
}
158166
}
159-
}
167+
};
160168
}
161169

162170
macro_rules! exti {
@@ -176,36 +184,44 @@ macro_rules! exti {
176184
fn trigger_on_edge(&mut self, exti: &mut EXTI, edge: Edge) {
177185
match edge {
178186
Edge::RISING => {
179-
exti.rtsr.modify(|r, w| unsafe { w.bits(r.bits() | (1 << $i)) });
180-
exti.ftsr.modify(|r, w| unsafe { w.bits(r.bits() & !(1 << $i)) });
181-
},
187+
exti.rtsr
188+
.modify(|r, w| unsafe { w.bits(r.bits() | (1 << $i)) });
189+
exti.ftsr
190+
.modify(|r, w| unsafe { w.bits(r.bits() & !(1 << $i)) });
191+
}
182192
Edge::FALLING => {
183-
exti.ftsr.modify(|r, w| unsafe { w.bits(r.bits() | (1 << $i)) });
184-
exti.rtsr.modify(|r, w| unsafe { w.bits(r.bits() & !(1 << $i)) });
185-
},
193+
exti.ftsr
194+
.modify(|r, w| unsafe { w.bits(r.bits() | (1 << $i)) });
195+
exti.rtsr
196+
.modify(|r, w| unsafe { w.bits(r.bits() & !(1 << $i)) });
197+
}
186198
Edge::RISING_FALLING => {
187-
exti.rtsr.modify(|r, w| unsafe { w.bits(r.bits() | (1 << $i)) });
188-
exti.ftsr.modify(|r, w| unsafe { w.bits(r.bits() | (1 << $i)) });
199+
exti.rtsr
200+
.modify(|r, w| unsafe { w.bits(r.bits() | (1 << $i)) });
201+
exti.ftsr
202+
.modify(|r, w| unsafe { w.bits(r.bits() | (1 << $i)) });
189203
}
190204
}
191205
}
192206

193207
/// Enable external interrupts from this pin.
194208
fn enable_interrupt(&mut self, exti: &mut EXTI) {
195-
exti.imr.modify(|r, w| unsafe { w.bits(r.bits() | (1 << $i)) });
209+
exti.imr
210+
.modify(|r, w| unsafe { w.bits(r.bits() | (1 << $i)) });
196211
}
197212

198213
/// Disable external interrupts from this pin
199214
fn disable_interrupt(&mut self, exti: &mut EXTI) {
200-
exti.imr.modify(|r, w| unsafe { w.bits(r.bits() & !(1 << $i)) });
215+
exti.imr
216+
.modify(|r, w| unsafe { w.bits(r.bits() & !(1 << $i)) });
201217
}
202218

203219
/// Clear the interrupt pending bit for this pin
204220
fn clear_interrupt_pending_bit(&mut self) {
205-
unsafe { (*EXTI::ptr()).pr.write(|w| w.bits(1 << $i) ) };
221+
unsafe { (*EXTI::ptr()).pr.write(|w| w.bits(1 << $i)) };
206222
}
207223
}
208-
}
224+
};
209225
}
210226

211227
macro_rules! gpio {

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