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burrbullburrbull
committed
bb revert
1 parent a8f0c79 commit d749a9f

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2 files changed

+49
-33
lines changed

2 files changed

+49
-33
lines changed

‎src/pwm.rs

Lines changed: 23 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
use crate::{
2-
hal,
2+
bb, hal,
33
pac::RCC,
44
rcc::{Clocks, Enable, Reset},
55
time::Hertz,
@@ -210,12 +210,12 @@ macro_rules! pwm_all_channels {
210210

211211
//NOTE(unsafe) atomic write with no side effects
212212
fn disable(&mut self) {
213-
unsafe { (*$TIMX::ptr()).ccer.modify(|_,w| w.cc1e().clear_bit()); }
213+
unsafe { bb::clear(&(*$TIMX::ptr()).ccer, 0) }
214214
}
215215

216216
//NOTE(unsafe) atomic write with no side effects
217217
fn enable(&mut self) {
218-
unsafe { (*$TIMX::ptr()).ccer.modify(|_,w| w.cc1e().set_bit()); }
218+
unsafe { bb::set(&(*$TIMX::ptr()).ccer, 0) }
219219
}
220220

221221
//NOTE(unsafe) atomic read with no side effects
@@ -239,12 +239,12 @@ macro_rules! pwm_all_channels {
239239

240240
//NOTE(unsafe) atomic write with no side effects
241241
fn disable(&mut self) {
242-
unsafe { (*$TIMX::ptr()).ccer.modify(|_,w| w.cc2e().clear_bit()); }
242+
unsafe { bb::clear(&(*$TIMX::ptr()).ccer, 4) }
243243
}
244244

245245
//NOTE(unsafe) atomic write with no side effects
246246
fn enable(&mut self) {
247-
unsafe { (*$TIMX::ptr()).ccer.modify(|_,w| w.cc2e().set_bit()); }
247+
unsafe { bb::set(&(*$TIMX::ptr()).ccer, 4) }
248248
}
249249

250250
//NOTE(unsafe) atomic read with no side effects
@@ -268,12 +268,12 @@ macro_rules! pwm_all_channels {
268268

269269
//NOTE(unsafe) atomic write with no side effects
270270
fn disable(&mut self) {
271-
unsafe { (*$TIMX::ptr()).ccer.modify(|_,w| w.cc3e().clear_bit()); }
271+
unsafe { bb::clear(&(*$TIMX::ptr()).ccer, 8) }
272272
}
273273

274274
//NOTE(unsafe) atomic write with no side effects
275275
fn enable(&mut self) {
276-
unsafe { (*$TIMX::ptr()).ccer.modify(|_,w| w.cc3e().set_bit()); }
276+
unsafe { bb::set(&(*$TIMX::ptr()).ccer, 8) }
277277
}
278278

279279
//NOTE(unsafe) atomic read with no side effects
@@ -297,12 +297,12 @@ macro_rules! pwm_all_channels {
297297

298298
//NOTE(unsafe) atomic write with no side effects
299299
fn disable(&mut self) {
300-
unsafe { (*$TIMX::ptr()).ccer.modify(|_,w| w.cc4e().clear_bit()); }
300+
unsafe { bb::clear(&(*$TIMX::ptr()).ccer, 12) }
301301
}
302302

303303
//NOTE(unsafe) atomic write with no side effects
304304
fn enable(&mut self) {
305-
unsafe { (*$TIMX::ptr()).ccer.modify(|_,w| w.cc4e().set_bit()); }
305+
unsafe { bb::set(&(*$TIMX::ptr()).ccer, 12) }
306306
}
307307

308308
//NOTE(unsafe) atomic read with no side effects
@@ -386,12 +386,12 @@ macro_rules! pwm_2_channels {
386386

387387
//NOTE(unsafe) atomic write with no side effects
388388
fn disable(&mut self) {
389-
unsafe { (*$TIMX::ptr()).ccer.modify(|_,w| w.cc1e().clear_bit()); }
389+
unsafe { bb::clear(&(*$TIMX::ptr()).ccer, 0) }
390390
}
391391

392392
//NOTE(unsafe) atomic write with no side effects
393393
fn enable(&mut self) {
394-
unsafe { (*$TIMX::ptr()).ccer.modify(|_,w| w.cc1e().set_bit()); }
394+
unsafe { bb::set(&(*$TIMX::ptr()).ccer, 0) }
395395
}
396396

397397
//NOTE(unsafe) atomic read with no side effects
@@ -415,12 +415,12 @@ macro_rules! pwm_2_channels {
415415

416416
//NOTE(unsafe) atomic write with no side effects
417417
fn disable(&mut self) {
418-
unsafe { (*$TIMX::ptr()).ccer.modify(|_,w| w.cc2e().clear_bit()); }
418+
unsafe { bb::clear(&(*$TIMX::ptr()).ccer, 4) }
419419
}
420420

421421
//NOTE(unsafe) atomic write with no side effects
422422
fn enable(&mut self) {
423-
unsafe { (*$TIMX::ptr()).ccer.modify(|_,w| w.cc2e().set_bit()); }
423+
unsafe { bb::set(&(*$TIMX::ptr()).ccer, 4) }
424424
}
425425

426426
//NOTE(unsafe) atomic read with no side effects
@@ -497,12 +497,12 @@ macro_rules! pwm_1_channel {
497497

498498
//NOTE(unsafe) atomic write with no side effects
499499
fn disable(&mut self) {
500-
unsafe { (*$TIMX::ptr()).ccer.modify(|_,w| w.cc1e().clear_bit()); }
500+
unsafe { bb::clear(&(*$TIMX::ptr()).ccer, 0) }
501501
}
502502

503503
//NOTE(unsafe) atomic write with no side effects
504504
fn enable(&mut self) {
505-
unsafe { (*$TIMX::ptr()).ccer.modify(|_,w| w.cc1e().set_bit()); }
505+
unsafe { bb::set(&(*$TIMX::ptr()).ccer, 0) }
506506
}
507507

508508
//NOTE(unsafe) atomic read with no side effects
@@ -595,12 +595,12 @@ macro_rules! pwm_tim5_f410 {
595595

596596
//NOTE(unsafe) atomic write with no side effects
597597
fn disable(&mut self) {
598-
unsafe { (*$TIMX::ptr()).ccer.modify(|_,w| w.cc1e().clear_bit()); }
598+
unsafe { bb::clear(&(*$TIMX::ptr()).ccer, 0) }
599599
}
600600

601601
//NOTE(unsafe) atomic write with no side effects
602602
fn enable(&mut self) {
603-
unsafe { (*$TIMX::ptr()).ccer.modify(|_,w| w.cc1e().set_bit()); }
603+
unsafe { bb::set(&(*$TIMX::ptr()).ccer, 0) }
604604
}
605605

606606
//NOTE(unsafe) atomic read with no side effects
@@ -624,12 +624,12 @@ macro_rules! pwm_tim5_f410 {
624624

625625
//NOTE(unsafe) atomic write with no side effects
626626
fn disable(&mut self) {
627-
unsafe { (*$TIMX::ptr()).ccer.modify(|_,w| w.cc2e().clear_bit()); }
627+
unsafe { bb::clear(&(*$TIMX::ptr()).ccer, 4) }
628628
}
629629

630630
//NOTE(unsafe) atomic write with no side effects
631631
fn enable(&mut self) {
632-
unsafe { (*$TIMX::ptr()).ccer.modify(|_,w| w.cc2e().set_bit()); }
632+
unsafe { bb::set(&(*$TIMX::ptr()).ccer, 4) }
633633
}
634634

635635
//NOTE(unsafe) atomic read with no side effects
@@ -653,12 +653,12 @@ macro_rules! pwm_tim5_f410 {
653653

654654
//NOTE(unsafe) atomic write with no side effects
655655
fn disable(&mut self) {
656-
unsafe { (*$TIMX::ptr()).ccer.modify(|_,w| w.cc3e().clear_bit()); }
656+
unsafe { bb::clear(&(*$TIMX::ptr()).ccer, 8) }
657657
}
658658

659659
//NOTE(unsafe) atomic write with no side effects
660660
fn enable(&mut self) {
661-
unsafe { (*$TIMX::ptr()).ccer.modify(|_,w| w.cc3e().set_bit()); }
661+
unsafe { bb::set(&(*$TIMX::ptr()).ccer, 8) }
662662
}
663663

664664
//NOTE(unsafe) atomic read with no side effects
@@ -682,12 +682,12 @@ macro_rules! pwm_tim5_f410 {
682682

683683
//NOTE(unsafe) atomic write with no side effects
684684
fn disable(&mut self) {
685-
unsafe { (*$TIMX::ptr()).ccer.modify(|_,w| w.cc4e().clear_bit()); }
685+
unsafe { bb::clear(&(*$TIMX::ptr()).ccer, 12) }
686686
}
687687

688688
//NOTE(unsafe) atomic write with no side effects
689689
fn enable(&mut self) {
690-
unsafe { (*$TIMX::ptr()).ccer.modify(|_,w| w.cc4e().set_bit()); }
690+
unsafe { bb::set(&(*$TIMX::ptr()).ccer, 12) }
691691
}
692692

693693
//NOTE(unsafe) atomic read with no side effects

‎src/rtc.rs

Lines changed: 26 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -2,6 +2,7 @@
22
//! For more details, see
33
//! [ST AN4759](https:/www.st.com%2Fresource%2Fen%2Fapplication_note%2Fdm00226326-using-the-hardware-realtime-clock-rtc-and-the-tamper-management-unit-tamp-with-stm32-microcontrollers-stmicroelectronics.pdf&usg=AOvVaw3PzvL2TfYtwS32fw-Uv37h)
44
5+
use crate::bb;
56
use crate::pac::{rcc::RegisterBlock, PWR, RCC, RTC};
67
use crate::rcc::Enable;
78
use core::convert::TryInto;
@@ -414,15 +415,27 @@ fn hours_to_u8(hours: Hours) -> Result<u8, Error> {
414415
/// Enable the low frequency external oscillator. This is the only mode currently
415416
/// supported, to avoid exposing the `CR` and `CRS` registers.
416417
fn enable_lse(rcc: &RegisterBlock, bypass: bool) {
417-
// Force a reset of the backup domain.
418-
rcc.bdcr.modify(|_, w| w.bdrst().set_bit());
419-
rcc.bdcr.modify(|_, w| w.bdrst().clear_bit());
420-
// Enable the LSE.
421-
rcc.bdcr
422-
.modify(|_, w| w.lseon().set_bit().lsebyp().bit(bypass));
423-
while rcc.bdcr.read().lserdy().bit_is_clear() {}
424-
// Set clock source to LSE.
425-
rcc.bdcr.modify(|_, w| w.rtcsel().lse());
418+
unsafe {
419+
// Force a reset of the backup domain.
420+
// Set BDCR - Bit 16 (BDRST)
421+
bb::set(&rcc.bdcr, 16);
422+
// Clear BDCR - Bit 16 (BDRST)
423+
bb::clear(&rcc.bdcr, 16);
424+
// Enable the LSE.
425+
// Set BDCR - Bit 0 (LSEON)
426+
bb::set(&rcc.bdcr, 0);
427+
if bypass {
428+
// Set BDCR - Bit 2 (LSEBYP)
429+
bb::set(&rcc.bdcr, 2);
430+
} else {
431+
// Clear BDCR - Bit 2 (LSEBYP)
432+
bb::clear(&rcc.bdcr, 2);
433+
}
434+
while rcc.bdcr.read().lserdy().bit_is_clear() {}
435+
// Set clock source to LSE.
436+
// Set BDCR - Bit 8 (RTCSEL to value for LSE)
437+
bb::set(&rcc.bdcr, 8);
438+
}
426439
}
427440

428441
fn unlock(rcc: &RegisterBlock, pwr: &mut PWR) {
@@ -440,5 +453,8 @@ fn unlock(rcc: &RegisterBlock, pwr: &mut PWR) {
440453

441454
fn enable(rcc: &RegisterBlock) {
442455
// Start the actual RTC.
443-
rcc.bdcr.modify(|_, w| w.rtcen().set_bit());
456+
// Set BDCR - Bit 15 (RTCEN)
457+
unsafe {
458+
bb::set(&rcc.bdcr, 15);
459+
}
444460
}

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