generic

Author: burrbull

CHANGELOG.md

@@ -12,6 +12,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
  - Split USART and UART implementations [#608]
  - Add `lapce` editor settings [#601]
  - Use `enum`s for alternate peripheral pins [#594] [#610]
+ - Use `enum`s for alternate peripheral pins [#594]
+ - Use `enum`s for alternate peripheral pins (generic over otype) [#594] [#596] [#600]
  - Added missing U(S)ART DMA traits for HAL serial types [#593]
  - Improve SPI::new* docs [#587]
  - Add advanced timer dead time insertion example [#585]
@@ -65,6 +67,13 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 [#577]: https://github.com/stm32-rs/stm32f4xx-hal/pull/577
 [#578]: https://github.com/stm32-rs/stm32f4xx-hal/pull/578
 [#581]: https://github.com/stm32-rs/stm32f4xx-hal/pull/581
+[#594]: https://github.com/stm32-rs/stm32f4xx-hal/pull/594
+[#595]: https://github.com/stm32-rs/stm32f4xx-hal/pull/595
+[#596]: https://github.com/stm32-rs/stm32f4xx-hal/pull/596
+[#599]: https://github.com/stm32-rs/stm32f4xx-hal/pull/599
+[#601]: https://github.com/stm32-rs/stm32f4xx-hal/pull/601
+[#603]: https://github.com/stm32-rs/stm32f4xx-hal/pull/603
+[#600]: https://github.com/stm32-rs/stm32f4xx-hal/pull/600
 
 
 ## [v0.14.0] - 2022-12-12

examples/i2s-audio-out.rs

@@ -104,7 +104,7 @@ fn main() -> ! {
         .i2s_clk(61440.kHz())
         .freeze();
 
-    let i2s_pins = (gpioa.pa4, gpioc.pc10, NoPin, gpioc.pc12);
+    let i2s_pins = (gpioa.pa4, gpioc.pc10, NoPin::new(), gpioc.pc12);
     let i2s = I2s::new(dp.SPI3, i2s_pins, &clocks);
     let i2s_config = I2sTransferConfig::new_master()
         .transmit()

examples/ist7920-bidi-normal-spi.rs

@@ -29,7 +29,7 @@ fn main() -> ! {
     led.set_low();
 
     let sck = gpiob.pb3.into_alternate();
-    let miso = NoMiso {};
+    let miso = NoMiso::new();
     let mosi = gpiob.pb5.into_alternate();
 
     let dc = gpiob.pb4.into_push_pull_output();

examples/rtic-i2s-audio-in-out.rs

@@ -188,7 +188,7 @@ mod app {
         i2s2_driver.set_error_interrupt(true);
 
         // I2S3 pins: (WS, CK, NoPin, SD) for I2S3
-        let i2s3_pins = (gpioa.pa4, gpioc.pc10, NoPin, gpioc.pc12);
+        let i2s3_pins = (gpioa.pa4, gpioc.pc10, NoPin::new(), gpioc.pc12);
         let i2s3 = I2s::new(device.SPI3, i2s3_pins, &clocks);
         let i2s3_config = i2s2_config.to_slave().transmit();
         let mut i2s3_driver = I2sDriver::new(i2s3, i2s3_config);

examples/spi-dma.rs

@@ -55,7 +55,7 @@ fn main() -> ! {
             phase: Phase::CaptureOnFirstTransition,
         };
 
-        let spi2 = Spi::new(dp.SPI2, (pb13, NoMiso {}, pb15), mode, 3.MHz(), &clocks);
+        let spi2 = Spi::new(dp.SPI2, (pb13, NoMiso::new(), pb15), mode, 3.MHz(), &clocks);
 
         let buffer = cortex_m::singleton!(: [u8; ARRAY_SIZE] = [1; ARRAY_SIZE]).unwrap();
 

examples/ws2812-spi.rs

@@ -22,7 +22,7 @@ fn main() -> ! {
     let gpioa = dp.GPIOA.split();
 
     let spi = dp.SPI1.spi(
-        (gpioa.pa5, NoPin, gpioa.pa7),
+        (gpioa.pa5, NoPin::new(), gpioa.pa7),
         ws2812::MODE,
         3500.kHz(),
         &clocks,

src/can.rs

@@ -105,7 +105,7 @@ impl<CAN: Instance> Can<CAN> {
     where
         NoPin: Into<CAN::Rx>,
     {
-        Self::new(usart, (tx_pin, NoPin))
+        Self::new(usart, (tx_pin, NoPin::new()))
     }
 }
 
@@ -114,7 +114,7 @@ impl<CAN: Instance> Can<CAN> {
     where
         NoPin: Into<CAN::Tx>,
     {
-        Self::new(usart, (NoPin, rx_pin))
+        Self::new(usart, (NoPin::new(), rx_pin))
     }
 }
 

src/fmpi2c.rs

@@ -1,6 +1,6 @@
 use core::ops::Deref;
 
-use crate::gpio;
+use crate::gpio::{self, OpenDrain};
 use crate::i2c::{Error, NoAcknowledgeSource};
 use crate::pac::{fmpi2c1, FMPI2C1, RCC};
 use crate::rcc::{Enable, Reset};
@@ -21,8 +21,8 @@ pub trait Instance:
 }
 
 impl Instance for FMPI2C1 {
-    type Sda = gpio::alt::fmpi2c1::Sda;
-    type Scl = gpio::alt::fmpi2c1::Scl;
+    type Sda = gpio::alt::fmpi2c1::Sda<OpenDrain>;
+    type Scl = gpio::alt::fmpi2c1::Scl<OpenDrain>;
     fn ptr() -> *const fmpi2c1::RegisterBlock {
         FMPI2C1::ptr() as *const _
     }

src/gpio.rs

@@ -76,9 +76,14 @@ pub use embedded_hal::digital::v2::PinState;
 use core::fmt;
 
 /// A filler pin type
-#[derive(Debug)]
+#[derive(Debug, Default)]
 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
-pub struct NoPin;
+pub struct NoPin<Otype = PushPull>(PhantomData<Otype>);
+impl<Otype> NoPin<Otype> {
+    pub fn new() -> Self {
+        Self(PhantomData)
+    }
+}
 
 /// Extension trait to split a GPIO peripheral in independent pins and registers
 pub trait GpioExt {