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clippy
1 parent 9f457f2 commit 9339467

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12 files changed

+39
-37
lines changed

12 files changed

+39
-37
lines changed

.github/workflows/clippy.yml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -19,4 +19,4 @@ jobs:
1919
- uses: actions-rs/clippy-check@v1
2020
with:
2121
token: ${{ secrets.GITHUB_TOKEN }}
22-
args: --examples --features=stm32f479,rt,usb_fs,sdio
22+
args: --examples --features=stm32f479,rt,usb_fs,sdio-host

src/bb.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -39,7 +39,7 @@ pub unsafe fn set<T>(register: *const T, bit: u8) {
3939
pub unsafe fn write<T>(register: *const T, bit: u8, set: bool) {
4040
let addr = register as usize;
4141

42-
assert!(addr >= PERI_ADDRESS_START && addr <= PERI_ADDRESS_END);
42+
assert!((PERI_ADDRESS_START..=PERI_ADDRESS_END).contains(&addr));
4343
assert!(bit < 32);
4444

4545
let bit = bit as usize;

src/dac.rs

Lines changed: 12 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,6 @@
33
//! Currently only supports writing to the DR of the DAC,
44
//! just a basic one-shot conversion.
55
#![deny(unused_imports)]
6-
use core::mem;
76

87
use crate::{
98
gpio::{
@@ -28,18 +27,29 @@ pub trait DacPin {
2827

2928
pub trait Pins<DAC> {
3029
type Output;
30+
#[doc(hidden)]
31+
fn init() -> Self::Output;
3132
}
3233

3334
impl Pins<DAC> for PA4<Analog> {
3435
type Output = C1;
36+
fn init() -> Self::Output {
37+
C1
38+
}
3539
}
3640

3741
impl Pins<DAC> for PA5<Analog> {
3842
type Output = C2;
43+
fn init() -> Self::Output {
44+
C2
45+
}
3946
}
4047

4148
impl Pins<DAC> for (PA4<Analog>, PA5<Analog>) {
4249
type Output = (C1, C2);
50+
fn init() -> Self::Output {
51+
(C1, C2)
52+
}
4353
}
4454

4555
pub fn dac<PINS>(_dac: DAC, _pins: PINS) -> PINS::Output
@@ -54,8 +64,7 @@ where
5464
DAC::enable(rcc);
5565
DAC::reset(rcc);
5666

57-
// NOTE(unsafe) ZST, doesn't need initialization.
58-
mem::MaybeUninit::uninit().assume_init()
67+
PINS::init()
5968
}
6069
}
6170

src/delay.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -18,7 +18,7 @@ impl Delay {
1818
pub fn new(mut syst: SYST, clocks: Clocks) -> Self {
1919
syst.set_clock_source(SystClkSource::External);
2020

21-
Delay { syst, clocks }
21+
Delay { clocks, syst }
2222
}
2323

2424
/// Releases the system timer (SysTick) resource

src/dma/mod.rs

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1449,6 +1449,7 @@ where
14491449
n_transfers
14501450
}
14511451

1452+
#[allow(clippy::branches_sharing_code)]
14521453
fn next_transfer_common(
14531454
&mut self,
14541455
new_buf: BUF,
@@ -1528,6 +1529,7 @@ where
15281529
///
15291530
/// Memory corruption might occur in the previous buffer, the one passed to the closure, if an
15301531
/// overrun occurs in double buffering mode.
1532+
#[allow(clippy::branches_sharing_code)]
15311533
unsafe fn next_transfer_with_common(
15321534
&mut self,
15331535
new_buf: BUF,
@@ -1570,7 +1572,6 @@ where
15701572
compiler_fence(Ordering::Acquire);
15711573

15721574
self.buf.replace(new_buf);
1573-
return;
15741575
} else {
15751576
// "Preceding reads and writes cannot be moved past subsequent writes"
15761577
compiler_fence(Ordering::Release);
@@ -1585,8 +1586,8 @@ where
15851586
compiler_fence(Ordering::Acquire);
15861587

15871588
self.double_buf.replace(new_buf);
1588-
return;
15891589
}
1590+
return;
15901591
}
15911592
let (buf_ptr, buf_len) = ptr_and_len;
15921593
self.stream.set_memory_address(buf_ptr as u32);

src/i2c.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -462,7 +462,7 @@ where
462462
// Calculate settings for I2C speed modes
463463
let clock = pclk.0;
464464
let freq = clock / 1_000_000;
465-
assert!(freq >= 2 && freq <= 50);
465+
assert!((2..=50).contains(&freq));
466466

467467
// Configure bus frequency into I2C peripheral
468468
self.i2c.cr2.write(|w| unsafe { w.freq().bits(freq as u8) });

src/rcc/mod.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -826,7 +826,7 @@ impl CFGR {
826826
sysclk
827827
};
828828

829-
assert!(unchecked || !sysclk_on_pll || sysclk <= SYSCLK_MAX && sysclk >= SYSCLK_MIN);
829+
assert!(unchecked || !sysclk_on_pll || (SYSCLK_MIN..=SYSCLK_MAX).contains(&sysclk));
830830

831831
let hclk = self.hclk.unwrap_or(sysclk);
832832
let (hpre_bits, hpre_div) = match (sysclk + hclk - 1) / hclk {

src/rcc/pll.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -58,7 +58,7 @@ impl MainPll {
5858
.unwrap();
5959

6060
let vco_in = pllsrcclk / pllm;
61-
assert!(vco_in >= 1_000_000 && vco_in <= 2_000_000);
61+
assert!((1_000_000..=2_000_000).contains(&vco_in));
6262

6363
// Main scaler, must result in >= 100MHz (>= 192MHz for F401)
6464
// and <= 432MHz, min 50, max 432
@@ -493,7 +493,7 @@ impl SingleOutputPll {
493493
let target_vco_out = target * outdiv;
494494
let n = (target_vco_out + (vco_in >> 1)) / vco_in;
495495
let vco_out = vco_in * n;
496-
if vco_out < 100_000_000 || vco_out > 432_000_000 {
496+
if !(100_000_000..=432_000_000).contains(&vco_out) {
497497
return None;
498498
}
499499
let output = vco_out / outdiv;

src/rtc.rs

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -166,7 +166,7 @@ impl Rtcc for Rtc {
166166
}
167167

168168
fn set_weekday(&mut self, weekday: u8) -> Result<(), Self::Error> {
169-
if (weekday < 1) || (weekday > 7) {
169+
if !(1..=7).contains(&weekday) {
170170
return Err(Error::InvalidInputData);
171171
}
172172
self.modify(|regs| regs.dr.modify(|_, w| unsafe { w.wdu().bits(weekday) }));
@@ -175,7 +175,7 @@ impl Rtcc for Rtc {
175175
}
176176

177177
fn set_day(&mut self, day: u8) -> Result<(), Self::Error> {
178-
if (day < 1) || (day > 31) {
178+
if !(1..=31).contains(&day) {
179179
return Err(Error::InvalidInputData);
180180
}
181181
let (dt, du) = bcd2_encode(day as u32)?;
@@ -185,7 +185,7 @@ impl Rtcc for Rtc {
185185
}
186186

187187
fn set_month(&mut self, month: u8) -> Result<(), Self::Error> {
188-
if (month < 1) || (month > 12) {
188+
if !(1..=12).contains(&month) {
189189
return Err(Error::InvalidInputData);
190190
}
191191
let (mt, mu) = bcd2_encode(month as u32)?;
@@ -195,7 +195,7 @@ impl Rtcc for Rtc {
195195
}
196196

197197
fn set_year(&mut self, year: u16) -> Result<(), Self::Error> {
198-
if (year < 1970) || (year > 2038) {
198+
if !(1970..=2038).contains(&year) {
199199
return Err(Error::InvalidInputData);
200200
}
201201
let (yt, yu) = bcd2_encode(year as u32 - 1970)?;

src/serial.rs

Lines changed: 3 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -343,6 +343,7 @@ use crate::rcc::Clocks;
343343
use crate::dma::traits::PeriAddress;
344344

345345
/// Serial error
346+
#[non_exhaustive]
346347
#[derive(Debug, Eq, PartialEq, Copy, Clone)]
347348
pub enum Error {
348349
/// Framing error
@@ -353,8 +354,6 @@ pub enum Error {
353354
Overrun,
354355
/// Parity check error
355356
Parity,
356-
#[doc(hidden)]
357-
_Extensible,
358357
}
359358

360359
/// Interrupt event
@@ -951,15 +950,9 @@ where
951950
WordLength::DataBits9 => true,
952951
})
953952
.pce()
954-
.bit(match config.parity {
955-
Parity::ParityNone => false,
956-
_ => true,
957-
})
953+
.bit(!matches!(config.parity, Parity::ParityNone))
958954
.ps()
959-
.bit(match config.parity {
960-
Parity::ParityOdd => true,
961-
_ => false,
962-
})
955+
.bit(matches!(config.parity, Parity::ParityOdd))
963956
})
964957
};
965958

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