Update synopsys-usb-otg dependency to v0.2.0

Author: Disasm

Cargo.toml

@@ -31,7 +31,7 @@ cortex-m-rt = "0.6.10"
 nb = "0.1.2"
 rand_core = "0.5.1"
 stm32f4 = "0.11"
-synopsys-usb-otg = { version = "0.1.0", features = ["cortex-m"], optional = true }
+synopsys-usb-otg = { version = "0.2.0", features = ["cortex-m"], optional = true }
 
 [dependencies.bare-metal]
 version = "0.2.5"

examples/usb_serial.rs

@@ -18,7 +18,7 @@ fn main() -> ! {
 
     let rcc = dp.RCC.constrain();
 
-    rcc.cfgr
+    let clocks = rcc.cfgr
         .use_hse(25.mhz())
         .sysclk(48.mhz())
         .require_pll48clk()
@@ -32,6 +32,7 @@ fn main() -> ! {
         usb_pwrclk: dp.OTG_FS_PWRCLK,
         pin_dm: gpioa.pa11.into_alternate_af10(),
         pin_dp: gpioa.pa12.into_alternate_af10(),
+        hclk: clocks.hclk(),
     };
 
     let usb_bus = UsbBus::new(usb, unsafe { &mut EP_MEMORY });

src/otg_fs.rs

@@ -9,6 +9,7 @@ use crate::gpio::{
     gpioa::{PA11, PA12},
     Alternate, AF10,
 };
+use crate::time::Hertz;
 
 pub use synopsys_usb_otg::UsbBus;
 use synopsys_usb_otg::UsbPeripheral;
@@ -19,6 +20,7 @@ pub struct USB {
     pub usb_pwrclk: stm32::OTG_FS_PWRCLK,
     pub pin_dm: PA11<Alternate<AF10>>,
     pub pin_dp: PA12<Alternate<AF10>>,
+    pub hclk: Hertz,
 }
 
 unsafe impl Sync for USB {}
@@ -29,6 +31,21 @@ unsafe impl UsbPeripheral for USB {
     const HIGH_SPEED: bool = false;
     const FIFO_DEPTH_WORDS: usize = 320;
 
+    #[cfg(any(
+        feature = "stm32f401",
+        feature = "stm32f405",
+        feature = "stm32f407",
+        feature = "stm32f415",
+        feature = "stm32f417",
+        feature = "stm32f427",
+        feature = "stm32f429",
+        feature = "stm32f437",
+        feature = "stm32f439",
+    ))]
+    const ENDPOINT_COUNT: usize = 4;
+    #[cfg(feature = "stm32f446")]
+    const ENDPOINT_COUNT: usize = 6;
+
     fn enable() {
         let rcc = unsafe { &*stm32::RCC::ptr() };
 
@@ -41,6 +58,10 @@ unsafe impl UsbPeripheral for USB {
             rcc.ahb2rstr.modify(|_, w| w.otgfsrst().clear_bit());
         });
     }
+
+    fn ahb_frequency_hz(&self) -> u32 {
+        self.hclk.0
+    }
 }
 
 pub type UsbBusType = UsbBus<USB>;

src/otg_hs.rs

@@ -12,6 +12,7 @@ use crate::gpio::{
     gpiob::{PB14, PB15},
     Alternate, AF12,
 };
+use crate::time::Hertz;
 
 pub use synopsys_usb_otg::UsbBus;
 use synopsys_usb_otg::UsbPeripheral;
@@ -22,6 +23,7 @@ pub struct USB {
     pub usb_pwrclk: stm32::OTG_HS_PWRCLK,
     pub pin_dm: PB14<Alternate<AF12>>,
     pub pin_dp: PB15<Alternate<AF12>>,
+    pub hclk: Hertz,
 }
 
 unsafe impl Sync for USB {}
@@ -32,6 +34,20 @@ unsafe impl UsbPeripheral for USB {
     const HIGH_SPEED: bool = true;
     const FIFO_DEPTH_WORDS: usize = 1024;
 
+    #[cfg(any(
+        feature = "stm32f405",
+        feature = "stm32f407",
+        feature = "stm32f415",
+        feature = "stm32f417",
+        feature = "stm32f427",
+        feature = "stm32f429",
+        feature = "stm32f437",
+        feature = "stm32f439",
+    ))]
+    const ENDPOINT_COUNT: usize = 6;
+    #[cfg(feature = "stm32f446")]
+    const ENDPOINT_COUNT: usize = 9;
+
     fn enable() {
         let rcc = unsafe { &*stm32::RCC::ptr() };
 
@@ -44,6 +60,10 @@ unsafe impl UsbPeripheral for USB {
             rcc.ahb1rstr.modify(|_, w| w.otghsrst().clear_bit());
         });
     }
+
+    fn ahb_frequency_hz(&self) -> u32 {
+        self.hclk.0
+    }
 }
 
 pub type UsbBusType = UsbBus<USB>;