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Merge pull request #792 from stm32-rs/fmc-upd
bump stm32-fmc
2 parents 478fee0 + b9405d0 commit 609f5a5

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5 files changed

+28
-30
lines changed

5 files changed

+28
-30
lines changed

Cargo.toml

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -57,7 +57,7 @@ embedded-hal-async = { version = "1.0", optional = true }
5757
rtic = { version = "2.0.1", features = ["thumbv7-backend"], optional = true }
5858
atomic-polyfill = { version = "1.0.3", optional = true }
5959

60-
stm32-fmc = { version = "0.3.0", optional = true }
60+
stm32-fmc = { version = "0.3.2", optional = true }
6161

6262
enumflags2 = "0.7.8"
6363
embedded-storage = "0.3"
@@ -768,6 +768,6 @@ required-features = ["otg-fs", "usb_fs"] # stm32f401
768768
name = "ws2812-spi"
769769
required-features = []
770770

771-
#[[example]]
772-
#name = "fmc-sdram"
773-
#required-features = ["stm32f469", "stm32-fmc"]
771+
[[example]]
772+
name = "fmc-sdram"
773+
required-features = ["stm32f469", "stm32-fmc"]

examples/fmc-sdram.rs.disabled renamed to examples/fmc-sdram.rs

Lines changed: 7 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -6,11 +6,8 @@
66

77
use panic_probe as _;
88

9-
use stm32f469i_disc as board;
10-
11-
use crate::board::hal::gpio::alt::fmc as alt;
12-
use crate::board::hal::{fmc::FmcExt, pac, prelude::*};
139
use core::{mem, slice};
10+
use stm32f4xx_hal::{fmc::FmcExt, gpio::alt::fmc as alt, pac, prelude::*};
1411

1512
use cortex_m::peripheral::Peripherals;
1613

@@ -101,26 +98,25 @@ fn main() -> ! {
10198
let mut pattern = XorShift32::new(seed);
10299

103100
// write our pattern
104-
for addr in 0..len_words {
101+
for (addr, res) in ram.iter_mut().enumerate().take(len_words) {
105102
let val = pattern.next();
106103

107104
if (addr & 0x1ffff) == 0 {
108105
rprintln!("Write: {:X} <- {:X}\r", (ram_ptr as usize) + addr, val);
109106
}
110107

111-
ram[addr] = val;
108+
*res = val;
112109
}
113110

114111
// read back pattern
115112
pattern = XorShift32::new(seed);
116-
for addr in 0..len_words {
113+
for (addr, &res) in ram.iter().enumerate().take(len_words) {
117114
let val = pattern.next();
118115

119116
if (addr & 0x1ffff) == 0 {
120117
rprintln!("Read: {:X} -> {:X}\r", (ram_ptr as usize) + addr, val);
121118
}
122119

123-
let res: u32 = ram[addr];
124120
if res != val {
125121
rprintln!(
126122
"Error: {:X} -> {:X} != {:X}\r",
@@ -134,5 +130,7 @@ fn main() -> ! {
134130

135131
rprintln!("Done!\r");
136132
}
137-
loop {}
133+
loop {
134+
continue;
135+
}
138136
}

src/dsi.rs

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -115,6 +115,7 @@ pub struct DsiPllConfig {
115115
}
116116

117117
impl DsiPllConfig {
118+
#[allow(clippy::missing_safety_doc)]
118119
pub unsafe fn manual(ndiv: u8, idf: u8, odf: u8, eckdiv: u8) -> Self {
119120
DsiPllConfig {
120121
ndiv,
@@ -399,11 +400,10 @@ impl DsiHost {
399400
.modify(|_, w| w.dep().clear_bit().vsp().clear_bit().hsp().clear_bit());
400401

401402
// Color coding for the host
402-
let lpe = match dsi_config.color_coding_host {
403-
ColorCoding::EighteenBitsConfig1 => true,
404-
ColorCoding::EighteenBitsConfig2 => true,
405-
_ => false,
406-
};
403+
let lpe = matches!(
404+
dsi_config.color_coding_host,
405+
ColorCoding::EighteenBitsConfig1 | ColorCoding::EighteenBitsConfig2
406+
);
407407
dsi.lcolcr().modify(|_, w| unsafe {
408408
w.lpe()
409409
.bit(lpe) // loosely packed: 18bits

src/i2c.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -450,7 +450,7 @@ impl<I2C: Instance> I2c<I2C> {
450450
return Err(Error::Overrun);
451451
}
452452

453-
self.prepare_read(addr.into(), first_transaction)?;
453+
self.prepare_read(addr, first_transaction)?;
454454
self.read_wo_prepare(buffer)
455455
}
456456

src/qspi.rs

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -165,21 +165,18 @@ impl QspiConfig {
165165
}
166166
}
167167

168-
#[derive(Copy, Clone, Debug, PartialEq)]
168+
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
169+
#[derive(Copy, Clone, Debug, Default, PartialEq, Eq)]
169170
#[repr(u8)]
170171
pub enum QspiMode {
172+
#[default]
171173
SingleChannel = 0b01,
172174
DualChannel = 0b10,
173175
QuadChannel = 0b11,
174176
}
175177

176-
impl Default for QspiMode {
177-
fn default() -> Self {
178-
QspiMode::SingleChannel
179-
}
180-
}
181-
182-
#[derive(Copy, Clone, Debug, PartialEq)]
178+
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
179+
#[derive(Copy, Clone, Debug, PartialEq, Eq)]
183180
#[repr(u8)]
184181
pub enum AddressSize {
185182
Addr8Bit = 0b00,
@@ -188,19 +185,22 @@ pub enum AddressSize {
188185
Addr32Bit = 0b11,
189186
}
190187

191-
#[derive(Copy, Clone, Debug, PartialEq)]
188+
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
189+
#[derive(Copy, Clone, Debug, PartialEq, Eq)]
192190
pub enum SampleShift {
193191
None,
194192
HalfACycle,
195193
}
196194

197-
#[derive(Copy, Clone, Debug, PartialEq)]
195+
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
196+
#[derive(Copy, Clone, Debug, PartialEq, Eq)]
198197
pub enum ClockMode {
199198
Mode0,
200199
Mode3,
201200
}
202201

203-
#[derive(Copy, Clone, Debug, PartialEq)]
202+
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
203+
#[derive(Copy, Clone, Debug, PartialEq, Eq)]
204204
pub enum QspiError {
205205
Busy,
206206
Address,

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