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write blocking spi impls manually
1 parent 98b8ea2 commit 32d9470

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2 files changed

+55
-18
lines changed

2 files changed

+55
-18
lines changed

CHANGELOG.md

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -51,6 +51,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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5252
### Changed
5353

54+
- Use manual impls for blocking spi instead of `Default`.
5455
- Split `Stream` trait on `Stream` and `StreamISR`.
5556
Use const generics for `Stream` and `Channel`.
5657
- [breaking-change] `Timer::new` now just initializes peripheral.

src/spi.rs

Lines changed: 54 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -416,13 +416,7 @@ where
416416
MISO: PinMiso<SPI>,
417417
MOSI: PinMosi<SPI>,
418418
{
419-
pub fn new(
420-
spi: SPI,
421-
pins: (SCK, MISO, MOSI),
422-
mode: Mode,
423-
freq: Hertz,
424-
clocks: Clocks,
425-
) -> Spi<SPI, (SCK, MISO, MOSI), TransferModeNormal> {
419+
pub fn new(spi: SPI, pins: (SCK, MISO, MOSI), mode: Mode, freq: Hertz, clocks: Clocks) -> Self {
426420
unsafe {
427421
// NOTE(unsafe) this reference will only be used for atomic writes with no side effects.
428422
let rcc = &(*RCC::ptr());
@@ -438,14 +432,22 @@ where
438432
.pre_init(mode, freq, SPI::get_frequency(&clocks))
439433
.init()
440434
}
435+
}
441436

437+
impl<SPI, SCK, MISO, MOSI> Spi<SPI, (SCK, MISO, MOSI), TransferModeBidi>
438+
where
439+
SPI: Instance,
440+
SCK: PinSck<SPI>,
441+
MISO: PinMiso<SPI>,
442+
MOSI: PinMosi<SPI>,
443+
{
442444
pub fn new_bidi(
443445
spi: SPI,
444446
pins: (SCK, MISO, MOSI),
445447
mode: Mode,
446448
freq: Hertz,
447449
clocks: Clocks,
448-
) -> Spi<SPI, (SCK, MISO, MOSI), TransferModeBidi> {
450+
) -> Self {
449451
unsafe {
450452
// NOTE(unsafe) this reference will only be used for atomic writes with no side effects.
451453
let rcc = &(*RCC::ptr());
@@ -698,28 +700,62 @@ where
698700
}
699701
}
700702

701-
impl<SPI, PINS> embedded_hal::blocking::spi::transfer::Default<u8>
702-
for Spi<SPI, PINS, TransferModeNormal>
703+
impl<SPI, PINS, TRANSFER_MODE> embedded_hal::blocking::spi::Transfer<u8>
704+
for Spi<SPI, PINS, TRANSFER_MODE>
703705
where
706+
Self: spi::FullDuplex<u8>,
704707
SPI: Instance,
705708
{
709+
type Error = <Self as spi::FullDuplex<u8>>::Error;
710+
711+
fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> {
712+
use spi::FullDuplex;
713+
for word in words.iter_mut() {
714+
nb::block!(self.send(*word))?;
715+
*word = nb::block!(self.read())?;
716+
}
717+
718+
Ok(words)
719+
}
706720
}
707721

708-
impl<SPI, PINS> embedded_hal::blocking::spi::write::Default<u8>
709-
for Spi<SPI, PINS, TransferModeNormal>
722+
impl<SPI, PINS, TRANSFER_MODE> embedded_hal::blocking::spi::Write<u8>
723+
for Spi<SPI, PINS, TRANSFER_MODE>
710724
where
725+
Self: spi::FullDuplex<u8>,
711726
SPI: Instance,
712727
{
728+
type Error = <Self as spi::FullDuplex<u8>>::Error;
729+
730+
fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> {
731+
use spi::FullDuplex;
732+
for word in words {
733+
nb::block!(self.send(*word))?;
734+
nb::block!(self.read())?;
735+
}
736+
737+
Ok(())
738+
}
713739
}
714740

715-
impl<SPI, PINS> embedded_hal::blocking::spi::transfer::Default<u8>
716-
for Spi<SPI, PINS, TransferModeBidi>
741+
impl<SPI, PINS, TRANSFER_MODE> embedded_hal::blocking::spi::WriteIter<u8>
742+
for Spi<SPI, PINS, TRANSFER_MODE>
717743
where
744+
Self: spi::FullDuplex<u8>,
718745
SPI: Instance,
719746
{
720-
}
747+
type Error = <Self as spi::FullDuplex<u8>>::Error;
748+
749+
fn write_iter<WI>(&mut self, words: WI) -> Result<(), Self::Error>
750+
where
751+
WI: IntoIterator<Item = u8>,
752+
{
753+
use spi::FullDuplex;
754+
for word in words.into_iter() {
755+
nb::block!(self.send(word))?;
756+
nb::block!(self.read())?;
757+
}
721758

722-
impl<SPI, PINS> embedded_hal::blocking::spi::write::Default<u8> for Spi<SPI, PINS, TransferModeBidi> where
723-
SPI: Instance
724-
{
759+
Ok(())
760+
}
725761
}

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