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rcc::Enable::is_
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+95
-84
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3 files changed

+95
-84
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CHANGELOG.md

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -9,6 +9,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
99

1010
### Changed
1111

12+
- `rcc::Enable`, `rcc::LPEnable` traits
1213
- move gpio, dma impls, adc pins in subdir, remove unused `From` impls [#658] [#664]
1314
- Bump `embedded-hal` to `1.0.0-alpha.10`. See [their changelog][embedded-hal-1.0.0-alpha.10] for further details. Note that this included breaking changes to the previous alpha APIs. [#663]
1415
- Fix race condition in sending start condition in I2C. [#662]

src/rcc/enable.rs

Lines changed: 12 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -18,26 +18,36 @@ macro_rules! bus_enable {
1818
bb::clear(Self::Bus::enr(rcc), $bit);
1919
}
2020
}
21+
#[inline(always)]
22+
fn is_enabled() -> bool {
23+
let rcc = pac::RCC::ptr();
24+
(Self::Bus::enr(unsafe { &*rcc }).read().bits() >> $bit) & 0x1 != 0
25+
}
2126
}
2227
};
2328
}
2429
macro_rules! bus_lpenable {
2530
($PER:ident => $bit:literal) => {
2631
impl LPEnable for crate::pac::$PER {
2732
#[inline(always)]
28-
fn low_power_enable(rcc: &RccRB) {
33+
fn enable_in_low_power(rcc: &RccRB) {
2934
unsafe {
3035
bb::set(Self::Bus::lpenr(rcc), $bit);
3136
}
3237
// Stall the pipeline to work around erratum 2.1.13 (DM00037591)
3338
cortex_m::asm::dsb();
3439
}
3540
#[inline(always)]
36-
fn low_power_disable(rcc: &RccRB) {
41+
fn disable_in_low_power(rcc: &RccRB) {
3742
unsafe {
3843
bb::clear(Self::Bus::lpenr(rcc), $bit);
3944
}
4045
}
46+
#[inline(always)]
47+
fn is_enabled_in_low_power() -> bool {
48+
let rcc = pac::RCC::ptr();
49+
(Self::Bus::lpenr(unsafe { &*rcc }).read().bits() >> $bit) & 0x1 != 0
50+
}
4151
}
4252
};
4353
}

src/rcc/mod.rs

Lines changed: 82 additions & 82 deletions
Original file line numberDiff line numberDiff line change
@@ -66,12 +66,32 @@ pub trait RccBus: crate::Sealed {
6666
/// Enable/disable peripheral
6767
#[allow(clippy::missing_safety_doc)]
6868
pub trait Enable: RccBus {
69+
/// Enables peripheral
6970
fn enable(rcc: &RccRB);
71+
72+
/// Disables peripheral
7073
fn disable(rcc: &RccRB);
74+
75+
/// Check if peripheral enabled
76+
fn is_enabled() -> bool;
77+
78+
/// Check if peripheral disabled
79+
#[inline]
80+
fn is_disabled() -> bool {
81+
!Self::is_enabled()
82+
}
83+
84+
/// # Safety
85+
///
86+
/// Enables peripheral. Takes access to RCC internally
7187
unsafe fn enable_unchecked() {
7288
let rcc = &*pac::RCC::ptr();
7389
Self::enable(rcc);
7490
}
91+
92+
/// # Safety
93+
///
94+
/// Disables peripheral. Takes access to RCC internally
7595
unsafe fn disable_unchecked() {
7696
let rcc = pac::RCC::ptr();
7797
Self::disable(&*rcc);
@@ -81,22 +101,47 @@ pub trait Enable: RccBus {
81101
/// Low power enable/disable peripheral
82102
#[allow(clippy::missing_safety_doc)]
83103
pub trait LPEnable: RccBus {
84-
fn low_power_enable(rcc: &RccRB);
85-
fn low_power_disable(rcc: &RccRB);
86-
unsafe fn low_power_enable_unchecked() {
104+
/// Enables peripheral in low power mode
105+
fn enable_in_low_power(rcc: &RccRB);
106+
107+
/// Disables peripheral in low power mode
108+
fn disable_in_low_power(rcc: &RccRB);
109+
110+
/// Check if peripheral enabled in low power mode
111+
fn is_enabled_in_low_power() -> bool;
112+
113+
/// Check if peripheral disabled in low power mode
114+
#[inline]
115+
fn is_disabled_in_low_power() -> bool {
116+
!Self::is_enabled_in_low_power()
117+
}
118+
119+
/// # Safety
120+
///
121+
/// Enables peripheral in low power mode. Takes access to RCC internally
122+
unsafe fn enable_in_low_power_unchecked() {
87123
let rcc = pac::RCC::ptr();
88-
Self::low_power_enable(&*rcc);
124+
Self::enable_in_low_power(&*rcc);
89125
}
90-
unsafe fn low_power_disable_unchecked() {
126+
127+
/// # Safety
128+
///
129+
/// Disables peripheral in low power mode. Takes access to RCC internally
130+
unsafe fn disable_in_low_power_unchecked() {
91131
let rcc = pac::RCC::ptr();
92-
Self::low_power_disable(&*rcc);
132+
Self::disable_in_low_power(&*rcc);
93133
}
94134
}
95135

96136
/// Reset peripheral
97137
#[allow(clippy::missing_safety_doc)]
98138
pub trait Reset: RccBus {
139+
/// Resets peripheral
99140
fn reset(rcc: &RccRB);
141+
142+
/// # Safety
143+
///
144+
/// Resets peripheral. Takes access to RCC internally
100145
unsafe fn reset_unchecked() {
101146
let rcc = pac::RCC::ptr();
102147
Self::reset(&*rcc);
@@ -141,46 +186,41 @@ where
141186
}
142187
}
143188

144-
/// AMBA High-performance Bus 1 (AHB1) registers
145-
pub struct AHB1 {
146-
_0: (),
147-
}
189+
macro_rules! bus_struct {
190+
($( $(#[$attr:meta])* $busX:ident => ($EN:ident, $en:ident, $LPEN:ident, $lpen:ident, $RST:ident, $rst:ident, $doc:literal),)+) => {
191+
$(
192+
$(#[$attr])*
193+
#[doc = $doc]
194+
pub struct $busX {
195+
_0: (),
196+
}
148197

149-
impl AHB1 {
150-
#[inline(always)]
151-
fn enr(rcc: &RccRB) -> &rcc::AHB1ENR {
152-
&rcc.ahb1enr
153-
}
154-
#[inline(always)]
155-
fn lpenr(rcc: &RccRB) -> &rcc::AHB1LPENR {
156-
&rcc.ahb1lpenr
157-
}
158-
#[inline(always)]
159-
fn rstr(rcc: &RccRB) -> &rcc::AHB1RSTR {
160-
&rcc.ahb1rstr
161-
}
162-
}
198+
$(#[$attr])*
199+
impl $busX {
200+
pub(crate) fn enr(rcc: &RccRB) -> &rcc::$EN {
201+
&rcc.$en
202+
}
163203

164-
/// AMBA High-performance Bus 2 (AHB2) registers
165-
#[cfg(not(feature = "gpio-f410"))]
166-
pub struct AHB2 {
167-
_0: (),
204+
pub(crate) fn lpenr(rcc: &RccRB) -> &rcc::$LPEN {
205+
&rcc.$lpen
206+
}
207+
208+
pub(crate) fn rstr(rcc: &RccRB) -> &rcc::$RST {
209+
&rcc.$rst
210+
}
211+
}
212+
)+
213+
};
168214
}
169215

170-
#[cfg(not(feature = "gpio-f410"))]
171-
impl AHB2 {
172-
#[inline(always)]
173-
fn enr(rcc: &RccRB) -> &rcc::AHB2ENR {
174-
&rcc.ahb2enr
175-
}
176-
#[inline(always)]
177-
fn lpenr(rcc: &RccRB) -> &rcc::AHB2LPENR {
178-
&rcc.ahb2lpenr
179-
}
180-
#[inline(always)]
181-
fn rstr(rcc: &RccRB) -> &rcc::AHB2RSTR {
182-
&rcc.ahb2rstr
183-
}
216+
bus_struct! {
217+
APB1 => (APB1ENR, apb1enr, APB1LPENR, apb1lpenr, APB1RSTR, apb1rstr, "Advanced Peripheral Bus 1 (APB1) registers"),
218+
APB2 => (APB2ENR, apb2enr, APB2LPENR, apb2lpenr, APB2RSTR, apb2rstr, "Advanced Peripheral Bus 2 (APB2) registers"),
219+
AHB1 => (AHB1ENR, ahb1enr, AHB1LPENR, ahb1lpenr, AHB1RSTR, ahb1rstr, "Advanced High-performance Bus 1 (AHB1) registers"),
220+
#[cfg(not(feature = "gpio-f410"))]
221+
AHB2 => (AHB2ENR, ahb2enr, AHB2LPENR, ahb2lpenr, AHB2RSTR, ahb2rstr, "Advanced High-performance Bus 2 (AHB2) registers"),
222+
//#[cfg(any(feature = "fsmc", feature = "fmc"))]
223+
//AHB3 => (AHB3ENR, ahb3enr, AHB3LPENR, ahb3lpenr, AHB3RSTR, ahb3rstr, "Advanced High-performance Bus 3 (AHB3) registers"),
184224
}
185225

186226
/// AMBA High-performance Bus 3 (AHB3) registers
@@ -206,46 +246,6 @@ impl AHB3 {
206246
}
207247
}
208248

209-
/// Advanced Peripheral Bus 1 (APB1) registers
210-
pub struct APB1 {
211-
_0: (),
212-
}
213-
214-
impl APB1 {
215-
#[inline(always)]
216-
fn enr(rcc: &RccRB) -> &rcc::APB1ENR {
217-
&rcc.apb1enr
218-
}
219-
#[inline(always)]
220-
fn lpenr(rcc: &RccRB) -> &rcc::APB1LPENR {
221-
&rcc.apb1lpenr
222-
}
223-
#[inline(always)]
224-
fn rstr(rcc: &RccRB) -> &rcc::APB1RSTR {
225-
&rcc.apb1rstr
226-
}
227-
}
228-
229-
/// Advanced Peripheral Bus 2 (APB2) registers
230-
pub struct APB2 {
231-
_0: (),
232-
}
233-
234-
impl APB2 {
235-
#[inline(always)]
236-
fn enr(rcc: &RccRB) -> &rcc::APB2ENR {
237-
&rcc.apb2enr
238-
}
239-
#[inline(always)]
240-
fn lpenr(rcc: &RccRB) -> &rcc::APB2LPENR {
241-
&rcc.apb2lpenr
242-
}
243-
#[inline(always)]
244-
fn rstr(rcc: &RccRB) -> &rcc::APB2RSTR {
245-
&rcc.apb2rstr
246-
}
247-
}
248-
249249
impl BusClock for AHB1 {
250250
fn clock(clocks: &Clocks) -> Hertz {
251251
clocks.hclk

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