Merge pull request #726 from stm32-rs/nb2

nb::serial

Author: therealprof

CHANGELOG.md

@@ -12,6 +12,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 - shorten gpio ptr access
 - bump embedded-hal to `1.0` (no more RC!)
 - make `embedded-hal` `1.0` main implementation
+- add `embedded-hal-nb::serial`
 
 ## [v0.19.0] - 2023-12-11
 

src/prelude.rs

@@ -39,11 +39,11 @@
 pub use embedded_hal::delay::DelayNs as _;
 pub use embedded_hal_02::adc::OneShot as _embedded_hal_adc_OneShot;
 pub use embedded_hal_02::blocking::serial::Write as _embedded_hal_blocking_serial_Write;
-pub use embedded_hal_02::serial::Read as _embedded_hal_serial_Read;
-pub use embedded_hal_02::serial::Write as _embedded_hal_serial_Write;
 pub use embedded_hal_02::Capture as _embedded_hal_Capture;
 pub use embedded_hal_02::Pwm as _embedded_hal_Pwm;
 pub use embedded_hal_02::Qei as _embedded_hal_Qei;
+pub use embedded_hal_nb::serial::Read as _embedded_hal_serial_nb_Read;
+pub use embedded_hal_nb::serial::Write as _embedded_hal_serial_nb_Write;
 pub use fugit::ExtU32 as _fugit_ExtU32;
 pub use fugit::RateExtU32 as _fugit_RateExtU32;
 

src/serial.rs

@@ -17,6 +17,7 @@
 use core::marker::PhantomData;
 
 mod hal_02;
+mod hal_1;
 
 pub(crate) mod uart_impls;
 pub use uart_impls::Instance;

src/serial/hal_1.rs

@@ -0,0 +1,105 @@
+mod nb {
+    use core::ops::Deref;
+
+    use super::super::{Error, Instance, RegisterBlockImpl, Rx, Serial, Tx};
+    use embedded_hal_nb::serial::{ErrorKind, Read, Write};
+
+    impl embedded_hal_nb::serial::Error for Error {
+        fn kind(&self) -> ErrorKind {
+            match self {
+                Error::Overrun => ErrorKind::Overrun,
+                Error::FrameFormat => ErrorKind::FrameFormat,
+                Error::Parity => ErrorKind::Parity,
+                Error::Noise => ErrorKind::Noise,
+                Error::Other => ErrorKind::Other,
+            }
+        }
+    }
+
+    impl<USART: Instance, WORD> embedded_hal_nb::serial::ErrorType for Serial<USART, WORD> {
+        type Error = Error;
+    }
+    impl<USART: Instance, WORD> embedded_hal_nb::serial::ErrorType for Rx<USART, WORD> {
+        type Error = Error;
+    }
+    impl<USART: Instance, WORD> embedded_hal_nb::serial::ErrorType for Tx<USART, WORD> {
+        type Error = Error;
+    }
+
+    impl<USART: Instance, WORD: Copy> Read<WORD> for Serial<USART, WORD>
+    where
+        Rx<USART, WORD>: Read<WORD, Error = Error>,
+    {
+        fn read(&mut self) -> nb::Result<WORD, Self::Error> {
+            self.rx.read()
+        }
+    }
+
+    impl<USART: Instance> Read<u8> for Rx<USART, u8>
+    where
+        <USART as Instance>::RegisterBlock: RegisterBlockImpl,
+    {
+        fn read(&mut self) -> nb::Result<u8, Self::Error> {
+            unsafe { (*USART::ptr()).read_u8() }
+        }
+    }
+
+    /// Reads 9-bit words from the UART/USART
+    ///
+    /// If the UART/USART was configured with `WordLength::DataBits9`, the returned value will contain
+    /// 9 received data bits and all other bits set to zero. Otherwise, the returned value will contain
+    /// 8 received data bits and all other bits set to zero.
+    impl<USART: Instance> Read<u16> for Rx<USART, u16>
+    where
+        <USART as Instance>::RegisterBlock: RegisterBlockImpl,
+    {
+        fn read(&mut self) -> nb::Result<u16, Self::Error> {
+            unsafe { (*USART::ptr()).read_u16() }
+        }
+    }
+
+    impl<USART: Instance, WORD: Copy> Write<WORD> for Serial<USART, WORD>
+    where
+        Tx<USART, WORD>: Write<WORD, Error = Error>,
+    {
+        fn flush(&mut self) -> nb::Result<(), Self::Error> {
+            self.tx.flush()
+        }
+
+        fn write(&mut self, byte: WORD) -> nb::Result<(), Self::Error> {
+            self.tx.write(byte)
+        }
+    }
+
+    impl<USART: Instance> Write<u8> for Tx<USART, u8>
+    where
+        <USART as Instance>::RegisterBlock: RegisterBlockImpl,
+        USART: Deref<Target = <USART as Instance>::RegisterBlock>,
+    {
+        fn write(&mut self, word: u8) -> nb::Result<(), Self::Error> {
+            self.usart.write_u8(word)
+        }
+        fn flush(&mut self) -> nb::Result<(), Self::Error> {
+            self.usart.flush()
+        }
+    }
+
+    /// Writes 9-bit words to the UART/USART
+    ///
+    /// If the UART/USART was configured with `WordLength::DataBits9`, the 9 least significant bits will
+    /// be transmitted and the other 7 bits will be ignored. Otherwise, the 8 least significant bits
+    /// will be transmitted and the other 8 bits will be ignored.
+    impl<USART: Instance> Write<u16> for Tx<USART, u16>
+    where
+        <USART as Instance>::RegisterBlock: RegisterBlockImpl,
+        USART: Deref<Target = <USART as Instance>::RegisterBlock>,
+    {
+        fn write(&mut self, word: u16) -> nb::Result<(), Self::Error> {
+            self.usart.write_u16(word)
+        }
+
+        fn flush(&mut self) -> nb::Result<(), Self::Error> {
+            self.usart.flush()
+        }
+    }
+}