@@ -704,34 +704,34 @@ impl<SPI: Instance> Inner<SPI> {
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/// can be written to the SPI.
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#[ inline]
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pub fn is_tx_empty ( & self ) -> bool {
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- self . flags ( ) . contains ( Flag :: TxEmpty )
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+ self . spi . sr . read ( ) . txe ( ) . bit_is_set ( )
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}
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/// Return `true` if the RXNE flag is set, i.e. new data has been received
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/// and can be read from the SPI.
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#[ inline]
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pub fn is_rx_not_empty ( & self ) -> bool {
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- self . flags ( ) . contains ( Flag :: RxNotEmpty )
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+ self . spi . sr . read ( ) . rxne ( ) . bit_is_set ( )
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}
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/// Return `true` if the MODF flag is set, i.e. the SPI has experienced a
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/// Master Mode Fault. (see chapter 28.3.10 of the STM32F4 Reference Manual)
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#[ inline]
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pub fn is_modf ( & self ) -> bool {
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- self . flags ( ) . contains ( Flag :: ModeFault )
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+ self . spi . sr . read ( ) . modf ( ) . bit_is_set ( )
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}
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/// Returns true if the transfer is in progress
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#[ inline]
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pub fn is_busy ( & self ) -> bool {
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- self . flags ( ) . contains ( Flag :: Busy )
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+ self . spi . sr . read ( ) . bsy ( ) . bit_is_set ( )
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}
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/// Return `true` if the OVR flag is set, i.e. new data has been received
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/// while the receive data register was already filled.
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#[ inline]
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pub fn is_overrun ( & self ) -> bool {
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- self . flags ( ) . contains ( Flag :: Overrun )
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+ self . spi . sr . read ( ) . ovr ( ) . bit_is_set ( )
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}
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#[ inline]
@@ -759,15 +759,15 @@ impl<SPI: Instance> Inner<SPI> {
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#[ inline( always) ]
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fn check_read < W : FrameSize > ( & mut self ) -> nb:: Result < W , Error > {
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- let flags = self . flags ( ) ;
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+ let sr = self . spi . sr . read ( ) ;
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- Err ( if flags . contains ( Flag :: Overrun ) {
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+ Err ( if sr . ovr ( ) . bit_is_set ( ) {
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Error :: Overrun . into ( )
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- } else if flags . contains ( Flag :: ModeFault ) {
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+ } else if sr . modf ( ) . bit_is_set ( ) {
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Error :: ModeFault . into ( )
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- } else if flags . contains ( Flag :: CrcError ) {
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+ } else if sr . crcerr ( ) . bit_is_set ( ) {
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Error :: Crc . into ( )
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- } else if flags . contains ( Flag :: RxNotEmpty ) {
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+ } else if sr . rxne ( ) . bit_is_set ( ) {
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return Ok ( self . read_data_reg ( ) ) ;
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} else {
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nb:: Error :: WouldBlock
@@ -776,21 +776,21 @@ impl<SPI: Instance> Inner<SPI> {
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#[ inline( always) ]
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fn check_send < W : FrameSize > ( & mut self , byte : W ) -> nb:: Result < ( ) , Error > {
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- let flags = self . flags ( ) ;
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+ let sr = self . spi . sr . read ( ) ;
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- Err ( if flags . contains ( Flag :: Overrun ) {
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+ Err ( if sr . ovr ( ) . bit_is_set ( ) {
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// Read from the DR to clear the OVR bit
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let _ = self . spi . dr . read ( ) ;
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Error :: Overrun . into ( )
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- } else if flags . contains ( Flag :: ModeFault ) {
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+ } else if sr . modf ( ) . bit_is_set ( ) {
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// Write to CR1 to clear MODF
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self . spi . cr1 . modify ( |_r, w| w) ;
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Error :: ModeFault . into ( )
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- } else if flags . contains ( Flag :: CrcError ) {
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+ } else if sr . crcerr ( ) . bit_is_set ( ) {
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// Clear the CRCERR bit
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self . spi . sr . modify ( |_r, w| w. crcerr ( ) . clear_bit ( ) ) ;
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Error :: Crc . into ( )
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- } else if flags . contains ( Flag :: TxEmpty ) {
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+ } else if sr . txe ( ) . bit_is_set ( ) {
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self . write_data_reg ( byte) ;
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return Ok ( ( ) ) ;
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} else {
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