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-23
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3 files changed

+27
-23
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CHANGELOG.md

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -9,6 +9,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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1010
### Added
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12+
- Add inherent impl of `PwmPin` methods on `PwmChannel`s.
1213
- `Serial:tx` and `Serial::rx` that take only 1 pin
1314
- Instead of `Alternate<AF1>` you can just use `Alternate<1>`.
1415
- `PinState` and `get/set_state`.

src/prelude.rs

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Original file line numberDiff line numberDiff line change
@@ -56,7 +56,6 @@ pub use embedded_hal::watchdog::WatchdogDisable as _embedded_hal_watchdog_Watchd
5656
pub use embedded_hal::watchdog::WatchdogEnable as _embedded_hal_watchdog_WatchdogEnable;
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pub use embedded_hal::Capture as _embedded_hal_Capture;
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pub use embedded_hal::Pwm as _embedded_hal_Pwm;
59-
pub use embedded_hal::PwmPin as _embedded_hal_PwmPin;
6059
pub use embedded_hal::Qei as _embedded_hal_Qei;
6160

6261
#[cfg(all(feature = "device-selected", feature = "dac"))]

src/pwm.rs

Lines changed: 26 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -144,31 +144,31 @@ macro_rules! pwm_pin {
144144
impl PwmChannels<$TIMX, $C> {
145145
//NOTE(unsafe) atomic write with no side effects
146146
#[inline]
147-
fn disable(&mut self) {
147+
pub fn disable(&mut self) {
148148
unsafe { bb::clear(&(*<$TIMX>::ptr()).ccer, $bit) }
149149
}
150150

151151
//NOTE(unsafe) atomic write with no side effects
152152
#[inline]
153-
fn enable(&mut self) {
153+
pub fn enable(&mut self) {
154154
unsafe { bb::set(&(*<$TIMX>::ptr()).ccer, $bit) }
155155
}
156156

157157
//NOTE(unsafe) atomic read with no side effects
158158
#[inline]
159-
fn get_duty(&self) -> u16 {
159+
pub fn get_duty(&self) -> u16 {
160160
unsafe { (*<$TIMX>::ptr()).$ccr.read().ccr().bits() as u16 }
161161
}
162162

163163
//NOTE(unsafe) atomic read with no side effects
164164
#[inline]
165-
fn get_max_duty(&self) -> u16 {
165+
pub fn get_max_duty(&self) -> u16 {
166166
unsafe { (*<$TIMX>::ptr()).arr.read().arr().bits() as u16 }
167167
}
168168

169169
//NOTE(unsafe) atomic write with no side effects
170170
#[inline]
171-
fn set_duty(&mut self, duty: u16) {
171+
pub fn set_duty(&mut self, duty: u16) {
172172
unsafe { (*<$TIMX>::ptr()).$ccr.write(|w| w.ccr().bits(duty.into())) }
173173
}
174174
}
@@ -191,7 +191,7 @@ macro_rules! pwm_pin {
191191
self.set_duty(duty)
192192
}
193193
}
194-
}
194+
};
195195
}
196196

197197
macro_rules! pwm_all_channels {
@@ -269,7 +269,7 @@ macro_rules! pwm_all_channels {
269269
}
270270

271271
macro_rules! pwm_2_channels {
272-
($($TIMX:ident: ($timX:ident, $pclk:ident, $ppre:ident),)+) => {
272+
($($TIMX:ty: ($timX:ident, $pclk:ident, $ppre:ident),)+) => {
273273
$(
274274
pub fn $timX<P, PINS, T>(tim: $TIMX, _pins: PINS, clocks: Clocks, freq: T) -> PINS::Channels
275275
where
@@ -281,8 +281,8 @@ macro_rules! pwm_2_channels {
281281
//NOTE(unsafe) this reference will only be used for atomic writes with no side effects
282282
let rcc = &(*RCC::ptr());
283283
// Enable and reset the timer peripheral
284-
$TIMX::enable(rcc);
285-
$TIMX::reset(rcc);
284+
<$TIMX>::enable(rcc);
285+
<$TIMX>::reset(rcc);
286286
}
287287
}
288288
if PINS::C1 {
@@ -332,7 +332,7 @@ macro_rules! pwm_2_channels {
332332
}
333333

334334
macro_rules! pwm_1_channel {
335-
($($TIMX:ident: ($timX:ident, $pclk:ident, $ppre:ident),)+) => {
335+
($($TIMX:ty: ($timX:ident, $pclk:ident, $ppre:ident),)+) => {
336336
$(
337337
pub fn $timX<P, PINS, T>(tim: $TIMX, _pins: PINS, clocks: Clocks, freq: T) -> PINS::Channels
338338
where
@@ -344,8 +344,8 @@ macro_rules! pwm_1_channel {
344344
//NOTE(unsafe) this reference will only be used for atomic writes with no side effects
345345
let rcc = &(*RCC::ptr());
346346
// Enable and reset the timer peripheral
347-
$TIMX::enable(rcc);
348-
$TIMX::reset(rcc);
347+
<$TIMX>::enable(rcc);
348+
<$TIMX>::reset(rcc);
349349
}
350350
}
351351
if PINS::C1 {
@@ -392,32 +392,36 @@ macro_rules! pwm_pin_tim5 {
392392
impl PwmChannels<$TIMX, $C> {
393393
//NOTE(unsafe) atomic write with no side effects
394394
#[inline]
395-
fn disable(&mut self) {
395+
pub fn disable(&mut self) {
396396
unsafe { bb::clear(&(*<$TIMX>::ptr()).ccer, 0) }
397397
}
398398

399399
//NOTE(unsafe) atomic write with no side effects
400400
#[inline]
401-
fn enable(&mut self) {
401+
pub fn enable(&mut self) {
402402
unsafe { bb::set(&(*<$TIMX>::ptr()).ccer, 0) }
403403
}
404404

405405
//NOTE(unsafe) atomic read with no side effects
406406
#[inline]
407-
fn get_duty(&self) -> u16 {
407+
pub fn get_duty(&self) -> u16 {
408408
unsafe { (*<$TIMX>::ptr()).$ccr.read().ccr1_l().bits() as u16 }
409409
}
410410

411411
//NOTE(unsafe) atomic read with no side effects
412412
#[inline]
413-
fn get_max_duty(&self) -> u16 {
413+
pub fn get_max_duty(&self) -> u16 {
414414
unsafe { (*<$TIMX>::ptr()).arr.read().arr_l().bits() as u16 }
415415
}
416416

417417
//NOTE(unsafe) atomic write with no side effects
418418
#[inline]
419-
fn set_duty(&mut self, duty: u16) {
420-
unsafe { (*<$TIMX>::ptr()).$ccr.write(|w| w.ccr1_l().bits(duty.into())) }
419+
pub fn set_duty(&mut self, duty: u16) {
420+
unsafe {
421+
(*<$TIMX>::ptr())
422+
.$ccr
423+
.write(|w| w.ccr1_l().bits(duty.into()))
424+
}
421425
}
422426
}
423427

@@ -439,12 +443,12 @@ macro_rules! pwm_pin_tim5 {
439443
self.set_duty(duty)
440444
}
441445
}
442-
}
446+
};
443447
}
444448

445449
#[cfg(feature = "stm32f410")]
446450
macro_rules! pwm_tim5_f410 {
447-
($($TIMX:ident: ($timX:ident, $pclk:ident, $ppre:ident),)+) => {
451+
($($TIMX:ty: ($timX:ident, $pclk:ident, $ppre:ident),)+) => {
448452
$(
449453
pub fn $timX<P, PINS, T>(tim: $TIMX, _pins: PINS, clocks: Clocks, freq: T) -> PINS::Channels
450454
where
@@ -456,8 +460,8 @@ macro_rules! pwm_tim5_f410 {
456460
//NOTE(unsafe) this reference will only be used for atomic writes with no side effects
457461
let rcc = &(*RCC::ptr());
458462
// Enable and reset the timer peripheral
459-
$TIMX::enable(rcc);
460-
$TIMX::reset(rcc);
463+
<$TIMX>::enable(rcc);
464+
<$TIMX>::reset(rcc);
461465
}
462466
}
463467
if PINS::C1 {

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