add rcc::Resets

Author: burrbull

src/crc32.rs

@@ -8,7 +8,7 @@
 //! to calculate. This operation stalls the AHB bus for that time.
 
 use crate::pac::{CRC, RCC};
-use crate::rcc::Enable;
+use crate::rcc::{Enable, Reset};
 use core::mem::MaybeUninit;
 use core::ptr::copy_nonoverlapping;
 
@@ -25,6 +25,7 @@ impl Crc32 {
             let rcc = &(*RCC::ptr());
             // enable CRC clock.
             CRC::enable(rcc);
+            CRC::reset(rcc);
         }
 
         let mut new = Self { periph: crc };

src/gpio.rs

@@ -667,7 +667,7 @@ macro_rules! gpio {
         /// GPIO
         pub mod $gpiox {
             use crate::pac::{$GPIOX, RCC};
-            use crate::rcc::Enable;
+            use crate::rcc::{Enable, Reset};
             use super::{
                 Floating, Input,
             };
@@ -690,6 +690,7 @@ macro_rules! gpio {
 
                         // Enable clock.
                         $GPIOX::enable(rcc);
+                        $GPIOX::reset(rcc);
                     }
                     Parts {
                         $(

src/serial.rs

@@ -19,7 +19,7 @@
 use core::fmt;
 use core::marker::PhantomData;
 
-use crate::rcc::Enable;
+use crate::rcc;
 use embedded_hal::blocking;
 use embedded_hal::prelude::*;
 use embedded_hal::serial;
@@ -591,6 +591,7 @@ where
 
             // Enable clock.
             USART::enable(rcc);
+            USART::reset(rcc);
         }
 
         let pclk_freq = USART::pclk_freq(&clocks);
@@ -1183,7 +1184,7 @@ mod private {
 }
 
 // Implemented by all USART instances
-pub trait Instance: private::Sealed + Enable {
+pub trait Instance: private::Sealed + rcc::Enable + rcc::Reset {
     #[doc(hidden)]
     fn ptr() -> *const uart_base::RegisterBlock;
     #[doc(hidden)]

src/spi.rs

@@ -24,7 +24,7 @@ use crate::gpio::gpioi;
 use crate::gpio::{gpioa, gpiob, gpioc};
 
 use crate::pac::{spi1, RCC, SPI1, SPI2};
-use crate::rcc::Enable;
+use crate::rcc;
 
 #[cfg(feature = "spi3")]
 use crate::pac::SPI3;
@@ -379,7 +379,9 @@ mod private {
 }
 
 // Implemented by all SPI instances
-pub trait Instance: private::Sealed + Deref<Target = spi1::RegisterBlock> + Enable {
+pub trait Instance:
+    private::Sealed + Deref<Target = spi1::RegisterBlock> + rcc::Enable + rcc::Reset
+{
     #[doc(hidden)]
     fn pclk_freq(clocks: &Clocks) -> Hertz;
 }
@@ -431,6 +433,7 @@ where
             // NOTE(unsafe) this reference will only be used for atomic writes with no side effects.
             let rcc = &(*RCC::ptr());
             SPI::enable(rcc);
+            SPI::reset(rcc);
         }
 
         Spi { spi, pins }.init(mode, freq, SPI::pclk_freq(&clocks))