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1 parent 4c7caf3 commit ed4e1a6Copy full SHA for ed4e1a6
src/adc.rs
@@ -294,19 +294,8 @@ where
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operation_mode: None,
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};
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- // if !(adc.clocks_welldefined(clocks)) {
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- // crate::panic!("Clock settings not well defined");
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- // }
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-
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ADC::enable_clock(&clocks, ahb, common_adc);
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- ADC::clock(&clocks);
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- // if !(ADC::enable_clock(ahb)){
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- // crate::panic!("Clock already enabled with a different setting");
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- // adc_shared.ccr.modify(|_, w| w
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- // .ckmode().variant(self.clock_mode.into())
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- // );
+
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adc.set_align(Align::default());
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adc.calibrate(clocks);
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// ADEN bit cannot be set during ADCAL=1
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