Merge master

Author: wbuck

.github/workflows/ci.yml

@@ -147,3 +147,14 @@ jobs:
         with:
           files: .
           ignore_files: "target/"
+
+  link-checker:
+    name: Link Checker
+    runs-on: ubuntu-latest
+    steps:
+    - name: Checkout
+      uses: actions/checkout@v2
+    - name: Check URLs in documentation
+      uses: lycheeverse/lychee-action@v1.0.4
+      with:
+        args: --verbose --no-progress "*.md" "**/*.md" "**/*.rs" "*.toml" "**/*.toml" -h accept=text/html

CHANGELOG.md

@@ -32,6 +32,14 @@ let clocks = rcc
 ```
 
 [embedded-time]: https://github.com/FluenTech/embedded-time/
+### Changed
+
+- Added support for more CAN bit rates and modes. ([#186])
+
+### Fixed
+
+- Delay based on systick no longer panics ([#203]) for to high values
+  and support longer delays ([#208])
 
 ## [v0.6.1] - 2020-12-10
 
@@ -288,7 +296,10 @@ let clocks = rcc
 
 - Support `stm32f303` device
 
+[#208]: https://github.com/stm32-rs/stm32f3xx-hal/pull/208
+[#203]: https://github.com/stm32-rs/stm32f3xx-hal/issues/203
 [#192]: https://github.com/stm32-rs/stm32f3xx-hal/pull/192
+[#186]: https://github.com/stm32-rs/stm32f3xx-hal/pull/186
 [#184]: https://github.com/stm32-rs/stm32f3xx-hal/pull/184
 [#172]: https://github.com/stm32-rs/stm32f3xx-hal/pull/172
 [#170]: https://github.com/stm32-rs/stm32f3xx-hal/pull/170
@@ -354,7 +365,7 @@ let clocks = rcc
 [#2]: https://github.com/stm32-rs/stm32f3xx-hal/pull/2
 
 [Unreleased]: https://github.com/stm32-rs/stm32f3xx-hal/compare/v0.6.1...HEAD
-[v0.6.0]: https://github.com/stm32-rs/stm32f3xx-hal/compare/v0.6.0...v0.6.1
+[v0.6.1]: https://github.com/stm32-rs/stm32f3xx-hal/compare/v0.6.0...v0.6.1
 [v0.6.0]: https://github.com/stm32-rs/stm32f3xx-hal/compare/v0.5.0...v0.6.0
 [v0.5.0]: https://github.com/stm32-rs/stm32f3xx-hal/compare/v0.4.3...v0.5.0
 [v0.4.3]: https://github.com/stm32-rs/stm32f3xx-hal/compare/v0.4.2...v0.4.3

README.md

@@ -126,3 +126,21 @@ expect it to do so.*
 ## License
 
 [0-clause BSD license](LICENSE-0BSD.txt).
+
+## Contributing
+
+### Running Tests
+
+Tests are run via the integration test pattern and are executed on a target chip, rather than on a host system.
+First, install [probe-run](https://crates.io/crates/probe-run) via `cargo install probe-run`.
+Next, you'll need to modify `.cargo/config` to link defmt and use `probe-run` configured for your chip.
+See details within the comments in that file.
+
+Now, you can execute a test by setting your device, defmt, and any test specific features:
+
+```
+cargo test --test rcc --features=stm32f303xc,defmt,rt
+```
+
+The result _always_ shows a backtrace, even in the case of success.
+Exit code of 0 means that the run was successful.

src/adc.rs

@@ -7,7 +7,7 @@
 //! It can be built for the STM32F3Discovery running
 //! `cargo build --example adc --features=stm32f303xc`
 //!
-//! [examples/adc.rs]: https://github.com/stm32-rs/stm32f3xx-hal/blob/v0.6.0/examples/adc.rs
+//! [examples/adc.rs]: https://github.com/stm32-rs/stm32f3xx-hal/blob/v0.6.1/examples/adc.rs
 
 use crate::{
     gpio::Analog,

src/can.rs

@@ -9,7 +9,7 @@
 //!
 //! A usage example of the can peripheral can be found at [examples/can.rs]
 //!
-//! [examples/can.rs]: https://github.com/stm32-rs/stm32f3xx-hal/blob/v0.6.0/examples/can.rs
+//! [examples/can.rs]: https://github.com/stm32-rs/stm32f3xx-hal/blob/v0.6.1/examples/can.rs
 
 pub use embedded_hal_can::{self, Filter, Frame, Id, Receiver, Transmitter};
 
@@ -20,10 +20,72 @@ use crate::stm32;
 use nb::{self, Error};
 
 use core::sync::atomic::{AtomicU8, Ordering};
+pub use stm32::can::btr::LBKM_A;
 
 const EXID_MASK: u32 = 0b1_1111_1111_1100_0000_0000_0000_0000;
 const MAX_EXTENDED_ID: u32 = 0x1FFF_FFFF;
 
+/// Options the CAN bus. This is primarily used to set bus timings, but also controls options like enabling loopback or silent mode for debugging.
+/// See  http://www.bittiming.can-wiki.info/#bxCAN for generating the timing parameters for different baud rates and clocks.
+///
+/// Use `CanOpts::default()` to get 250kbps at 32mhz system clock
+pub struct CanOpts {
+    brp: u16,
+    sjw: u8,
+    ts1: u8,
+    ts2: u8,
+    lbkm: LBKM_A,
+}
+
+impl CanOpts {
+    /// Create new `CanOpts` using the default settings from `CanOpts::default()` to get 250kbps at 32mhz system clock.
+    pub fn new() -> CanOpts {
+        CanOpts::default()
+    }
+
+    /// Set the Baud Rate Prescaler. See  http://www.bittiming.can-wiki.info/#bxCAN for generating the timing parameters for different baud rates and clocks.
+    pub fn brp(mut self, brp: u16) -> Self {
+        self.brp = brp;
+        self
+    }
+
+    /// Set the Resynchronisation Jump Width. See  http://www.bittiming.can-wiki.info/#bxCAN for generating the timing parameters for different baud rates and clocks.
+    pub fn sjw(mut self, sjw: u8) -> Self {
+        self.sjw = sjw;
+        self
+    }
+
+    /// Set Time Segment One. See  http://www.bittiming.can-wiki.info/#bxCAN for generating the timing parameters for different baud rates and clocks.
+    pub fn ts1(mut self, ts1: u8) -> Self {
+        self.ts1 = ts1;
+        self
+    }
+
+    /// Set Time Segment Two. See  http://www.bittiming.can-wiki.info/#bxCAN for generating the timing parameters for different baud rates and clocks.
+    pub fn ts2(mut self, ts2: u8) -> Self {
+        self.ts2 = ts2;
+        self
+    }
+
+    /// Enable or disable loopback mode on the CAN device. This is useful for debugging.
+    pub fn lbkm(mut self, lbkm: LBKM_A) -> Self {
+        self.lbkm = lbkm;
+        self
+    }
+}
+
+impl Default for CanOpts {
+    fn default() -> Self {
+        CanOpts {
+            brp: 4,
+            sjw: 0,
+            ts1: 10,
+            ts2: 3,
+            lbkm: LBKM_A::DISABLED,
+        }
+    }
+}
+
 /// A CAN identifier, which can be either 11 or 27 (extended) bits.
 /// u16 and u32 respectively are used here despite the fact that the upper bits are unused.
 #[derive(Debug, Copy, Clone, Eq, PartialEq)]
@@ -252,42 +314,28 @@ impl CanFilterData {
 }
 
 impl Can {
-    /// Initialize the CAN Peripheral
-    pub fn new(
+    /// Initialize the CAN peripheral using the options specified by `opts`.
+    pub fn new_with_opts(
         can: stm32::CAN,
         rx: gpioa::PA11<AF9>,
         tx: gpioa::PA12<AF9>,
         apb1: &mut APB1,
-    ) -> Self {
+        opts: CanOpts,
+    ) -> Can {
         apb1.enr().modify(|_, w| w.canen().enabled());
         can.mcr.modify(|_, w| w.sleep().clear_bit());
         can.mcr.modify(|_, w| w.inrq().set_bit());
 
         // Wait for INAK to confirm we have entered initialization mode
         while !can.msr.read().inak().bit_is_set() {}
 
-        // TODO: actually calculate baud params
-
-        // Our baud rate calc here is aiming for roughly 4000uS total bit time or about 250kbps
-        // Though we actually allow closer to 5500uS total given the sjw setting
-        // Calculations for timing value from http://www.bittiming.can-wiki.info/#bxCAN
-
-        // Baud rate prescaler defines time quanta
-        // tq = (BRP[9:0]+1) x tPCLK
-        let brp: u16 = 4;
-
-        // Resynchronization jump width: number of quanta segments may be expanded to resync
-        // tRJW = tq x (SJW[1:0] + 1)
-        let sjw = 0;
-
-        // Time seg 2
-        // tBS2 = tq x (TS2[2:0] + 1)
-        let ts2 = 3;
-
-        // Time seg 1
-        // tBS1 = tq x (TS1[3:0] + 1)
-        let ts1 = 10;
-
+        let CanOpts {
+            brp,
+            sjw,
+            ts1,
+            ts2,
+            lbkm,
+        } = opts;
         can.btr.modify(|_, w| unsafe {
             w.brp()
                 .bits(brp)
@@ -297,8 +345,8 @@ impl Can {
                 .bits(ts1)
                 .ts2()
                 .bits(ts2)
-            //.lbkm()
-            //.set_bit()
+                .lbkm()
+                .variant(lbkm)
         });
 
         // Leave initialization mode by clearing INRQ and switch to normal mode
@@ -312,6 +360,15 @@ impl Can {
             _tx: tx,
         }
     }
+    /// Initialize the CAN Peripheral using default options from `CanOpts::default()`
+    pub fn new(
+        can: stm32::CAN,
+        rx: gpioa::PA11<AF9>,
+        tx: gpioa::PA12<AF9>,
+        apb1: &mut APB1,
+    ) -> Self {
+        Can::new_with_opts(can, rx, tx, apb1, CanOpts::default())
+    }
 
     /// Enable CAN event interrupts for `Event`
     pub fn listen(&mut self, event: Event) {
@@ -407,7 +464,7 @@ impl embedded_hal_can::Transmitter for CanTransmitter {
 
                 // NOTE(unsafe): full 8bit write is unsafe via the svd2rust api
                 tx.tdtr
-                    .modify(|_, w| unsafe { w.dlc().bits(data.len() as u8) });
+                    .modify(|_, w| unsafe { w.dlc().bits(frame.dlc as u8) });
 
                 tx.tir.modify(|_, w| w.rtr().clear_bit());
             } else {
@@ -554,7 +611,7 @@ impl CanFrame {
     ///
     /// This function will panic if length of `data` is greater than `8`
     pub fn new_data(id: CanId, data: &[u8]) -> CanFrame {
-        crate::assert!((0..8).contains(&data.len()));
+        crate::assert!((0..=8).contains(&data.len()));
 
         let mut frame = Self {
             id,
@@ -569,7 +626,7 @@ impl CanFrame {
     ///
     /// # Panics
     ///
-    /// This function will panic if `dlc` is not inside the vliad range `0..=8`.
+    /// This function will panic if `dlc` is not inside the valid range `0..=8`.
     pub fn new_remote(id: CanId, dlc: usize) -> CanFrame {
         assert!((0..=8).contains(&dlc));
 
@@ -579,4 +636,14 @@ impl CanFrame {
             data: [0; 8],
         }
     }
+
+    /// Length of the frame data
+    pub fn len(&self) -> usize {
+        self.dlc
+    }
+
+    /// Is this frame empty. This usually indicates a remote frame.
+    pub fn is_empty(&self) -> bool {
+        self.dlc == 0
+    }
 }

src/delay.rs

@@ -16,10 +16,19 @@ pub struct Delay {
 
 impl Delay {
     /// Configures the system timer (SysTick) as a delay provider
+    ///
+    /// # Limitations
+    ///
+    /// Depending on the core clock, this delay provider
+    /// can delay between 1 minute (for 72 Mhz) up to almost 9 minutes (for 8 Mhz).
+    /// Higher input values will be capped to these limits.
+    ///
+    /// For accuracy purposes and because this is a blocking, busy-waiting function,
+    /// if delays in the second to minute range are needed, use timers instead.
     pub fn new(mut syst: SYST, clocks: Clocks) -> Self {
         syst.set_clock_source(SystClkSource::Core);
 
-        Delay { syst, clocks }
+        Delay { clocks, syst }
     }
 
     /// Releases the system timer (SysTick) resource
@@ -30,7 +39,7 @@ impl Delay {
 
 impl DelayMs<u32> for Delay {
     fn delay_ms(&mut self, ms: u32) {
-        self.delay_us(ms * 1_000);
+        self.delay_us(ms.saturating_mul(1_000));
     }
 }
 
@@ -48,17 +57,36 @@ impl DelayMs<u8> for Delay {
 
 impl DelayUs<u32> for Delay {
     fn delay_us(&mut self, us: u32) {
-        let rvr = us * (self.clocks.sysclk().0 / 1_000_000);
-
-        crate::assert!(rvr < (1 << 24));
-
-        self.syst.set_reload(rvr);
-        self.syst.clear_current();
-        self.syst.enable_counter();
-
-        while !self.syst.has_wrapped() {}
-
-        self.syst.disable_counter();
+        // The RVR register is 24 bits wide, as SysTick is based on a 24 bit counter
+        const MAX_RVR: u32 = 1 << 24;
+
+        // Depending on hclk (core clock), this 32 bit value allows
+        // delays between 1 min to 9 min.
+        //
+        // (((32^2) - 1) / 72) µs ~ 59.6 seconds
+        // (((32^2) - 1) / 8) µs  ~ 536.8 seconds
+        let mut total_rvr = us.saturating_mul(self.clocks.hclk().0 / 1_000_000);
+
+        // Use the full 32 bit range to allow longer delays
+        //
+        // Like dividing total_rvr / MAX_RVR
+        // and delaying by MAX_RVR * (fraction).
+        while total_rvr != 0 {
+            let current_rvr = if total_rvr < MAX_RVR {
+                total_rvr
+            } else {
+                MAX_RVR
+            };
+            total_rvr -= current_rvr;
+
+            self.syst.set_reload(current_rvr);
+            self.syst.clear_current();
+            self.syst.enable_counter();
+
+            while !self.syst.has_wrapped() {}
+
+            self.syst.disable_counter();
+        }
     }
 }
 

src/dma.rs

@@ -4,7 +4,7 @@
 //!
 //! An example how to use DMA for serial, can be found at [examples/serial_dma.rs]
 //!
-//! [examples/serial_dma.rs]: https://github.com/stm32-rs/stm32f3xx-hal/blob/v0.6.0/examples/serial_dma.rs
+//! [examples/serial_dma.rs]: https://github.com/stm32-rs/stm32f3xx-hal/blob/v0.6.1/examples/serial_dma.rs
 
 // To learn about most of the ideas implemented here, check out the DMA section
 // of the Embedonomicon: https://docs.rust-embedded.org/embedonomicon/dma.html

src/gpio.rs

@@ -26,7 +26,7 @@
 //!
 //! [InputPin]: embedded_hal::digital::v2::InputPin
 //! [OutputPin]: embedded_hal::digital::v2::OutputPin
-//! [examples/toggle.rs]: https://github.com/stm32-rs/stm32f3xx-hal/blob/v0.6.0/examples/toggle.rs
+//! [examples/toggle.rs]: https://github.com/stm32-rs/stm32f3xx-hal/blob/v0.6.1/examples/toggle.rs
 
 use core::convert::Infallible;
 use core::marker::PhantomData;
@@ -163,7 +163,7 @@ macro_rules! gpio {
         ///
         /// See [examples/gpio_erased.rs] as an example.
         ///
-        /// [examples/gpio_erased.rs]: https://github.com/stm32-rs/stm32f3xx-hal/blob/v0.6.0/examples/gpio_erased.rs
+        /// [examples/gpio_erased.rs]: https://github.com/stm32-rs/stm32f3xx-hal/blob/v0.6.1/examples/gpio_erased.rs
         pub struct PXx<MODE> {
             i: u8,
             gpio: Gpio,

src/i2c.rs

@@ -2,7 +2,7 @@
 //!
 //! A usage example of the i2c peripheral can be found at [examples/i2c_scanner.rs]
 //!
-//! [examples/i2c_scanner.rs]: https://github.com/stm32-rs/stm32f3xx-hal/blob/v0.6.0/examples/i2c_scanner.rs
+//! [examples/i2c_scanner.rs]: https://github.com/stm32-rs/stm32f3xx-hal/blob/v0.6.1/examples/i2c_scanner.rs
 
 use core::convert::TryFrom;
 use core::ops::Deref;