@@ -28,12 +28,29 @@ use crate::pac::{
28
28
use crate :: rcc:: { Clocks , AHB } ;
29
29
use stm32f3:: Variant ;
30
30
31
+
31
32
const MAX_ADVREGEN_STARTUP : Microseconds = Microseconds ( 10 ) ;
32
33
34
+ /// Vref internal signal, used for calibration
35
+ #[ derive( Debug ) ]
36
+ #[ cfg_attr( feature = "defmt" , derive( defmt:: Format ) ) ]
37
+ pub struct Vref ;
38
+
39
+ /// Vbat internal signal, used for monitoring the battery (if used)
40
+ #[ derive( Debug ) ]
41
+ #[ cfg_attr( feature = "defmt" , derive( defmt:: Format ) ) ]
42
+ pub struct Vbat ;
43
+
44
+ /// Core temperature internal signal
45
+ #[ derive( Debug ) ]
46
+ #[ cfg_attr( feature = "defmt" , derive( defmt:: Format ) ) ]
47
+ pub struct Temperature ;
48
+
33
49
/// Analog Digital Converter Peripheral
34
50
// TODO: Remove `pub` from the register block once all functionalities are implemented.
35
51
// Leave it here until then as it allows easy access to the registers.
36
52
// TODO(Sh3Rm4n) Add configuration and other things like in the `stm32f4xx-hal` crate
53
+ #[ derive( Debug ) ]
37
54
pub struct Adc < ADC > {
38
55
/// ADC Register
39
56
adc : ADC ,
@@ -154,6 +171,73 @@ macro_rules! adc_pins {
154
171
} ;
155
172
}
156
173
174
+ /// Maps pins to ADC Channels.
175
+ macro_rules! channel {
176
+ ( $ADC: ident: { $( $Pin: ident => $chan: ident) ,+ $( , ) * } ) => {
177
+ $(
178
+ impl Channel <pac:: $ADC> for $Pin {
179
+ type ID = u8 ;
180
+
181
+ fn channel( ) -> u8 { $chan }
182
+ }
183
+ ) +
184
+ } ;
185
+ }
186
+
187
+ cfg_if:: cfg_if! {
188
+ // stm32f303xd/xe
189
+ if #[ cfg( feature = "svd-f303e" ) ] {
190
+ channel!( ADC1 : {
191
+ gpio:: PA0 <Analog > => 1 ,
192
+ gpio:: PA1 <Analog > => 2 ,
193
+ gpio:: PA2 <Analog > => 3 ,
194
+ gpio:: PA3 <Analog > => 4 ,
195
+ gpio:: PF4 <Analog > => 5 ,
196
+
197
+ Temperature => 16 ,
198
+ Vbat => 17 ,
199
+ Vref => 18 ,
200
+ // VrefOpAmp1 => 15,
201
+
202
+ // ADC12
203
+ gpio:: PC0 <Analog > => 6 ,
204
+ gpio:: PC1 <Analog > => 7 ,
205
+ gpio:: PC2 <Analog > => 8 ,
206
+ gpio:: PC3 <Analog > => 9 ,
207
+ gpio:: PF2 <Analog > => 10 ,
208
+ gpio:: PB11 <Analog > => 14 ,
209
+ } ) ;
210
+
211
+ channel!( ADC2 : {
212
+ gpio:: PA4 <Analog > => 1 ,
213
+ gpio:: PA5 <Analog > => 2 ,
214
+ gpio:: PA6 <Analog > => 3 ,
215
+ gpio:: PA7 <Analog > => 4 ,
216
+ gpio:: PC4 <Analog > => 5 ,
217
+ gpio:: PC5 <Analog > => 11 ,
218
+ gpio:: PB2 <Analog > => 12 ,
219
+ // ADC12
220
+ gpio:: PC0 <Analog > => 6 ,
221
+ gpio:: PC1 <Analog > => 7 ,
222
+ gpio:: PC2 <Analog > => 8 ,
223
+ gpio:: PC3 <Analog > => 9 ,
224
+ gpio:: PF2 <Analog > => 10 ,
225
+ gpio:: PB11 <Analog > => 14 ,
226
+ } ) ;
227
+
228
+ channel!( ADC3 : {
229
+ gpio:: PB0 <Analog > => 12 ,
230
+ gpio:: PB1 <Analog > => 1 ,
231
+ gpio:: PE
232
+ // VrefOpAmp3 => 17
233
+ } )
234
+
235
+ channel!( ADC4 : {
236
+ // VrefOpAmp4 => 17
237
+ } )
238
+ }
239
+ }
240
+
157
241
// # ADC1 Pin/Channel mapping
158
242
// ## f303
159
243
0 commit comments