@@ -270,8 +270,8 @@ adc_pins!(ADC4,
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gpiod:: PD12 <Analog > => 9 ,
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gpiod:: PD13 <Analog > => 10 ,
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gpiod:: PD14 <Analog > => 11 ,
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- gpiob :: PD8 <Analog > => 12 ,
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- gpiob :: PD9 <Analog > => 13 ,
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+ gpiod :: PD8 <Analog > => 12 ,
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+ gpiod :: PD9 <Analog > => 13 ,
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) ;
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// Abstract implementation of ADC functionality
@@ -287,24 +287,30 @@ macro_rules! adc_hal {
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/// Init a new ADC
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///
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/// Enables the clock, performs a calibration and enables the ADC
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+ ///
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+ /// # Panics
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+ /// If one of the following occurs:
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+ /// * the clocksetting is not well defined.
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+ /// * the clock was already enabled with a different setting
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+ ///
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pub fn $adcx(
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rb: $ADC,
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adc_common : & mut $ADC_COMMON,
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ahb: & mut AHB ,
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ckmode: CKMODE ,
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clocks: Clocks ,
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- ) -> Option < Self > {
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+ ) -> Self {
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let mut this_adc = Self {
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rb,
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clocks,
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ckmode,
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operation_mode: None ,
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} ;
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if !( this_adc. clocks_welldefined( clocks) ) {
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- return None ;
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+ panic! ( "Clock settings not well defined" ) ;
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}
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if !( this_adc. enable_clock( ahb, adc_common) ) {
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- return None ;
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+ panic! ( "Clock already enabled with a different setting" ) ;
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}
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this_adc. set_align( Align :: default ( ) ) ;
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this_adc. calibrate( ) ;
@@ -313,13 +319,19 @@ macro_rules! adc_hal {
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// bit is cleared by hardware
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this_adc. wait_adc_clk_cycles( 4 ) ;
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this_adc. enable( ) ;
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- Some ( this_adc)
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+
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+ this_adc
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}
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/// Software can use CKMODE::SYNCDIV1 only if
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/// hclk and sysclk are the same. (see reference manual 15.3.3)
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fn clocks_welldefined( & self , clocks: Clocks ) -> bool {
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- !( self . ckmode == CKMODE :: SYNCDIV1 && !( clocks. hclk( ) . 0 == clocks. sysclk( ) . 0 ) )
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+ if ( self . ckmode == CKMODE :: SYNCDIV1 )
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+ {
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+ clocks. hclk( ) . 0 == clocks. sysclk( ) . 0
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+ } else {
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+ true
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+ }
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}
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/// sets up adc in one shot mode for a single channel
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