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Update changelog for #189
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CHANGELOG.md

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@@ -7,15 +7,31 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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## [Unreleased]
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## [v0.7.0] - 2021-03-10
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### Added
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- Replace custom time based units with types defined in the [embedded-time][] crate ([#192])
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- Replace custom time based units with types defined in the [embedded-time][]
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crate ([#192])
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- Make `Clocks` `ppre1()` and `ppre2()` methods public, to get the current
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Prescaler value. ([#210])
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- Implement `into_xxx` methods for partially erased pins ([#189])
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- Enable better GPIO internal resistor configuration ([#189])
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- Support for GPIO output slew rate configuration ([#189])
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- Support for GPIO interrupts ([#189])
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### Breaking changes
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[embedded-time]: https://github.com/FluenTech/embedded-time/
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### Changed
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- Added support for more CAN bit rates and modes. ([#186])
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- The structure of `gpio.rs` is greatly changed. Generic `Pin` struct is used
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for every GPIO pin now ([#189])
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### Fixed
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- Delay based on systick no longer panics ([#203]) for to high values
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and support longer delays ([#208])
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### Breaking Changes
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- The `rcc` public API now expects time based units in `Megahertz`.
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If the supplied frequency cannot be converted to `Hertz` the code
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```
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- Bump dependencies: ([#211])
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- `stm32f3` dependency to 0.13.0
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- `nb` to 1.0
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- `stm32f3` dependency to 0.13
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- `nb` to 1
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- `cortex-m` to 0.7
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- `stm32-usbd` to 0.6
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- `defmt` to 0.2
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[embedded-time]: https://github.com/FluenTech/embedded-time/
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### Changed
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- Added support for more CAN bit rates and modes. ([#186])
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### Fixed
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- Delay based on systick no longer panics ([#203]) for to high values
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and support longer delays ([#208])
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- `into_afx` methods are splitted into `into_afx_push_pull` and
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`into_afx_open_drain` ([#189])
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- GPIO internal resistor configuration is no longer encoded into pin typestate
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in input mode ([#189])
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## [v0.6.1] - 2020-12-10
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- Impls for all SPI pins for all `stm32f302` sub-targets, `stm32f303`
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subtargets, `stm32f3x8` targets, `stm32f334`, and `stm32f373`
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([#99])
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- SPI4 peripheral for supported
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devices. ([#99])
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- SPI4 peripheral for supported devices. ([#99])
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- Support for I2C transfer of more than 255 bytes, and 0 byte write ([#154])
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- Support for HSE bypass and CSS ([#156])
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- Impls for missing I2C pin definitions ([#164])
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[#208]: https://github.com/stm32-rs/stm32f3xx-hal/pull/208
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[#203]: https://github.com/stm32-rs/stm32f3xx-hal/issues/203
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[#192]: https://github.com/stm32-rs/stm32f3xx-hal/pull/192
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[#189]: https://github.com/stm32-rs/stm32f3xx-hal/pull/189
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[#186]: https://github.com/stm32-rs/stm32f3xx-hal/pull/186
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[#184]: https://github.com/stm32-rs/stm32f3xx-hal/pull/184
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[#172]: https://github.com/stm32-rs/stm32f3xx-hal/pull/172
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[#170]: https://github.com/stm32-rs/stm32f3xx-hal/pull/170
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[#164]: https://github.com/stm32-rs/stm32f3xx-hal/pull/164
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[#164]: https://github.com/stm32-rs/stm32f3xx-hal/pull/164
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[#164]: https://github.com/stm32-rs/stm32f3xx-hal/pull/164
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[#164]: https://github.com/stm32-rs/stm32f3xx-hal/pull/164
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[#164]: https://github.com/stm32-rs/stm32f3xx-hal/pull/164
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[#156]: https://github.com/stm32-rs/stm32f3xx-hal/pull/156
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[#154]: https://github.com/stm32-rs/stm32f3xx-hal/pull/154
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[#152]: https://github.com/stm32-rs/stm32f3xx-hal/pull/152
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[#101]: https://github.com/stm32-rs/stm32f3xx-hal/pull/101
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[#100]: https://github.com/stm32-rs/stm32f3xx-hal/pull/100
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[#99]: https://github.com/stm32-rs/stm32f3xx-hal/pull/99
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[#99]: https://github.com/stm32-rs/stm32f3xx-hal/pull/99
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[#99]: https://github.com/stm32-rs/stm32f3xx-hal/pull/99
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[#98]: https://github.com/stm32-rs/stm32f3xx-hal/pull/98
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[#97]: https://github.com/stm32-rs/stm32f3xx-hal/pull/97
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[#91]: https://github.com/stm32-rs/stm32f3xx-hal/pull/91
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[#86]: https://github.com/stm32-rs/stm32f3xx-hal/pull/86
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[#86]: https://github.com/stm32-rs/stm32f3xx-hal/pull/86
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[#82]: https://github.com/stm32-rs/stm32f3xx-hal/pull/82
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[#75]: https://github.com/stm32-rs/stm32f3xx-hal/pull/75
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[#72]: https://github.com/stm32-rs/stm32f3xx-hal/pull/72
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[#70]: https://github.com/stm32-rs/stm32f3xx-hal/pull/70
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[#67]: https://github.com/stm32-rs/stm32f3xx-hal/pull/67
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[#67]: https://github.com/stm32-rs/stm32f3xx-hal/pull/67
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[#60]: https://github.com/stm32-rs/stm32f3xx-hal/pull/60
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[#58]: https://github.com/stm32-rs/stm32f3xx-hal/pull/58
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[#56]: https://github.com/stm32-rs/stm32f3xx-hal/pull/56
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[#52]: https://github.com/stm32-rs/stm32f3xx-hal/pull/52
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[#50]: https://github.com/stm32-rs/stm32f3xx-hal/pull/50
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[#50]: https://github.com/stm32-rs/stm32f3xx-hal/pull/50
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[#47]: https://github.com/stm32-rs/stm32f3xx-hal/pull/47
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[#42]: https://github.com/stm32-rs/stm32f3xx-hal/pull/42
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[#39]: https://github.com/stm32-rs/stm32f3xx-hal/pull/39
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[#35]: https://github.com/stm32-rs/stm32f3xx-hal/pull/18
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[#35]: https://github.com/stm32-rs/stm32f3xx-hal/pull/35
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[#34]: https://github.com/stm32-rs/stm32f3xx-hal/pull/34
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[#33]: https://github.com/stm32-rs/stm32f3xx-hal/pull/33
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[#31]: https://github.com/stm32-rs/stm32f3xx-hal/pull/33
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[#16]: https://github.com/stm32-rs/stm32f3xx-hal/pull/16
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[#14]: https://github.com/stm32-rs/stm32f3xx-hal/pull/14
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[#12]: https://github.com/stm32-rs/stm32f3xx-hal/pull/12
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[#12]: https://github.com/stm32-rs/stm32f3xx-hal/pull/12
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[#11]: https://github.com/stm32-rs/stm32f3xx-hal/pull/11
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[#6]: https://github.com/stm32-rs/stm32f3xx-hal/pull/6
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[#4]: https://github.com/stm32-rs/stm32f3xx-hal/pull/4

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