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Allow configuration of QEI slave mode
1 parent 17bf918 commit d494da0

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2 files changed

+67
-12
lines changed

2 files changed

+67
-12
lines changed

examples/qei.rs

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -9,7 +9,7 @@ use panic_semihosting as _;
99
use cortex_m_semihosting::hprintln;
1010

1111
use cortex_m_rt::entry;
12-
use stm32f1xx_hal::{delay::Delay, pac, prelude::*, timer::Timer};
12+
use stm32f1xx_hal::{delay::Delay, pac, prelude::*, qei::QeiOptions, timer::Timer};
1313

1414
#[entry]
1515
fn main() -> ! {
@@ -38,7 +38,11 @@ fn main() -> ! {
3838
let c1 = gpiob.pb6;
3939
let c2 = gpiob.pb7;
4040

41-
let qei = Timer::tim4(dp.TIM4, &clocks, &mut rcc.apb1).qei((c1, c2), &mut afio.mapr);
41+
let qei = Timer::tim4(dp.TIM4, &clocks, &mut rcc.apb1).qei(
42+
(c1, c2),
43+
&mut afio.mapr,
44+
QeiOptions::default(),
45+
);
4246
let mut delay = Delay::new(cp.SYST, clocks);
4347

4448
loop {

src/qei.rs

Lines changed: 61 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,37 @@ use crate::afio::MAPR;
2020
use crate::pwm_input::Pins;
2121
use crate::timer::{sealed::Remap, Timer};
2222

23+
/// SMS (Slave Mode Selection) register
24+
pub enum SlaveMode {
25+
/// Counter counts up/down on TI2FP1 edge depending on TI1FP2 level.
26+
EncoderMode1 = 0b001,
27+
/// Encoder mode 2 - Counter counts up/down on TI1FP2 edge depending on TI2FP1 level.
28+
EncoderMode2 = 0b010,
29+
/// Encoder mode 3 - Counter counts up/down on both TI1FP1 and TI2FP2 edges depending on the
30+
/// level of the other input.
31+
EncoderMode3 = 0b011,
32+
/// Reset Mode - Rising edge of the selected trigger input (TRGI) reinitializes the counter and
33+
/// generates an update of the registers.
34+
ResetMode = 0b100,
35+
/// Trigger Mode - The counter starts at a rising edge of the trigger TRGI (but it is not
36+
/// reset). Only the start of the counter is controlled.
37+
TriggerMode = 0b110,
38+
/// External Clock Mode 1 - Rising edges of the selected trigger (TRGI) clock the counter.
39+
ExternalClockMode1 = 0b111,
40+
}
41+
42+
pub struct QeiOptions {
43+
slave_mode: SlaveMode,
44+
}
45+
46+
impl Default for QeiOptions {
47+
fn default() -> Self {
48+
Self {
49+
slave_mode: SlaveMode::EncoderMode3,
50+
}
51+
}
52+
}
53+
2354
pub struct Qei<TIM, REMAP, PINS> {
2455
tim: TIM,
2556
pins: PINS,
@@ -28,63 +59,83 @@ pub struct Qei<TIM, REMAP, PINS> {
2859

2960
#[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "stm32f105",))]
3061
impl Timer<TIM1> {
31-
pub fn qei<REMAP, PINS>(self, pins: PINS, mapr: &mut MAPR) -> Qei<TIM1, REMAP, PINS>
62+
pub fn qei<REMAP, PINS>(
63+
self,
64+
pins: PINS,
65+
mapr: &mut MAPR,
66+
options: QeiOptions,
67+
) -> Qei<TIM1, REMAP, PINS>
3268
where
3369
REMAP: Remap<Periph = TIM1>,
3470
PINS: Pins<REMAP>,
3571
{
3672
mapr.modify_mapr(|_, w| unsafe { w.tim1_remap().bits(REMAP::REMAP) });
3773

3874
let Self { tim, clk: _ } = self;
39-
Qei::_tim1(tim, pins)
75+
Qei::_tim1(tim, pins, options)
4076
}
4177
}
4278

4379
impl Timer<TIM2> {
44-
pub fn qei<REMAP, PINS>(self, pins: PINS, mapr: &mut MAPR) -> Qei<TIM2, REMAP, PINS>
80+
pub fn qei<REMAP, PINS>(
81+
self,
82+
pins: PINS,
83+
mapr: &mut MAPR,
84+
options: QeiOptions,
85+
) -> Qei<TIM2, REMAP, PINS>
4586
where
4687
REMAP: Remap<Periph = TIM2>,
4788
PINS: Pins<REMAP>,
4889
{
4990
mapr.modify_mapr(|_, w| unsafe { w.tim2_remap().bits(REMAP::REMAP) });
5091

5192
let Self { tim, clk: _ } = self;
52-
Qei::_tim2(tim, pins)
93+
Qei::_tim2(tim, pins, options)
5394
}
5495
}
5596

5697
impl Timer<TIM3> {
57-
pub fn qei<REMAP, PINS>(self, pins: PINS, mapr: &mut MAPR) -> Qei<TIM3, REMAP, PINS>
98+
pub fn qei<REMAP, PINS>(
99+
self,
100+
pins: PINS,
101+
mapr: &mut MAPR,
102+
options: QeiOptions,
103+
) -> Qei<TIM3, REMAP, PINS>
58104
where
59105
REMAP: Remap<Periph = TIM3>,
60106
PINS: Pins<REMAP>,
61107
{
62108
mapr.modify_mapr(|_, w| unsafe { w.tim3_remap().bits(REMAP::REMAP) });
63109

64110
let Self { tim, clk: _ } = self;
65-
Qei::_tim3(tim, pins)
111+
Qei::_tim3(tim, pins, options)
66112
}
67113
}
68114

69115
#[cfg(feature = "medium")]
70116
impl Timer<TIM4> {
71-
pub fn qei<REMAP, PINS>(self, pins: PINS, mapr: &mut MAPR) -> Qei<TIM4, REMAP, PINS>
117+
pub fn qei<REMAP, PINS>(
118+
self,
119+
pins: PINS,
120+
mapr: &mut MAPR,
121+
options: QeiOptions,
122+
) -> Qei<TIM4, REMAP, PINS>
72123
where
73124
REMAP: Remap<Periph = TIM4>,
74125
PINS: Pins<REMAP>,
75126
{
76127
mapr.modify_mapr(|_, w| w.tim4_remap().bit(REMAP::REMAP == 1));
77128

78129
let Self { tim, clk: _ } = self;
79-
Qei::_tim4(tim, pins)
130+
Qei::_tim4(tim, pins, options)
80131
}
81132
}
82133

83134
macro_rules! hal {
84135
($($TIMX:ident: ($timX:ident, $timXen:ident, $timXrst:ident),)+) => {
85136
$(
86137
impl<REMAP, PINS> Qei<$TIMX, REMAP, PINS> {
87-
fn $timX(tim: $TIMX, pins: PINS) -> Self {
138+
fn $timX(tim: $TIMX, pins: PINS, options: QeiOptions) -> Self {
88139
// Configure TxC1 and TxC2 as captures
89140
tim.ccmr1_input().write(|w| w.cc1s().ti1().cc2s().ti2());
90141

@@ -101,7 +152,7 @@ macro_rules! hal {
101152
});
102153

103154
// configure as quadrature encoder
104-
tim.smcr.write(|w| w.sms().bits(3));
155+
tim.smcr.write(|w| w.sms().bits(options.slave_mode as u8));
105156

106157
tim.arr.write(|w| w.arr().bits(u16::MAX));
107158
tim.cr1.write(|w| w.cen().set_bit());

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