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Connectivity line devices config supports ADC2
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CHANGELOG.md

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@@ -14,6 +14,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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### Changed
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- Connectivity line devices configuration supports ADC2
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- replace `GetBusFreq` with `BusClock` and `BusTimerClock`
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## [v0.8.0] - 2021-12-29

examples/adc.rs

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@@ -27,7 +27,7 @@ fn main() -> ! {
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// Setup ADC
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let mut adc1 = adc::Adc::adc1(p.ADC1, clocks);
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#[cfg(feature = "stm32f103")]
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#[cfg(any(feature = "stm32f103", feature = "connectivity"))]
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let mut adc2 = adc::Adc::adc2(p.ADC2, clocks);
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// Setup GPIOB
@@ -36,14 +36,14 @@ fn main() -> ! {
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// Configure pb0, pb1 as an analog input
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let mut ch0 = gpiob.pb0.into_analog(&mut gpiob.crl);
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#[cfg(feature = "stm32f103")]
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#[cfg(any(feature = "stm32f103", feature = "connectivity"))]
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let mut ch1 = gpiob.pb1.into_analog(&mut gpiob.crl);
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loop {
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let data: u16 = adc1.read(&mut ch0).unwrap();
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hprintln!("adc1: {}", data).unwrap();
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#[cfg(feature = "stm32f103")]
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#[cfg(any(feature = "stm32f103", feature = "connectivity"))]
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{
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let data1: u16 = adc2.read(&mut ch1).unwrap();
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hprintln!("adc2: {}", data1).unwrap();

src/adc.rs

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@@ -15,7 +15,7 @@ use core::sync::atomic::{self, Ordering};
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use cortex_m::asm::delay;
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use embedded_dma::StaticWriteBuffer;
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#[cfg(feature = "stm32f103")]
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#[cfg(any(feature = "stm32f103", feature = "connectivity"))]
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use crate::pac::ADC2;
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#[cfg(all(feature = "stm32f103", any(feature = "high", feature = "xl")))]
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use crate::pac::ADC3;
@@ -137,7 +137,7 @@ adc_pins!(ADC1,
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gpioc::PC5<Analog> => 15_u8,
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);
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#[cfg(any(feature = "stm32f103",))]
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#[cfg(any(feature = "stm32f103", feature = "connectivity"))]
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adc_pins!(ADC2,
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gpioa::PA0<Analog> => 0_u8,
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gpioa::PA1<Analog> => 1_u8,
@@ -547,7 +547,7 @@ adc_hal! {
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ADC1: (adc1),
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}
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#[cfg(feature = "stm32f103")]
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#[cfg(any(feature = "stm32f103", feature = "connectivity"))]
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adc_hal! {
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ADC2: (adc2),
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}

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