Skip to content

Commit b7d0af2

Browse files
committed
serial::Config::from(Bps)
1 parent 01dfad3 commit b7d0af2

File tree

2 files changed

+9
-2
lines changed

2 files changed

+9
-2
lines changed

CHANGELOG.md

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
1616

1717
### Added
1818

19+
- `From<Bps>` for `serial::Config`
1920
- `From<Into<Hertz>>` for `i2c::Mode`
2021
- `exti_rtic` example
2122
- Support for OpenDrain pin configuration on SPI CLK and MOSI pins

src/serial.rs

Lines changed: 8 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -175,6 +175,12 @@ impl Default for Config {
175175
}
176176
}
177177

178+
impl From<Bps> for Config {
179+
fn from(baud: Bps) -> Self {
180+
Config::default().baudrate(baud)
181+
}
182+
}
183+
178184
use crate::pac::usart1 as uart_base;
179185

180186
/// Serial abstraction
@@ -368,14 +374,14 @@ macro_rules! hal {
368374
usart: $USARTX,
369375
pins: PINS,
370376
mapr: &mut MAPR,
371-
config: Config,
377+
config: impl Into<Config>,
372378
clocks: Clocks,
373379
) -> Self
374380
where
375381
PINS: Pins<$USARTX>,
376382
{
377383
#[allow(unused_unsafe)]
378-
Serial { usart, pins, tx: Tx::new(), rx: Rx::new() }.init(config, clocks, || {
384+
Serial { usart, pins, tx: Tx::new(), rx: Rx::new() }.init(config.into(), clocks, || {
379385
mapr.modify_mapr(|_, w| unsafe {
380386
#[allow(clippy::redundant_closure_call)]
381387
w.$usartX_remap().$bit(($closure)(PINS::REMAP))

0 commit comments

Comments
 (0)