Skip to content

Commit 272b1bd

Browse files
serial: code duplication removed
1 parent ca7ce90 commit 272b1bd

File tree

1 file changed

+16
-19
lines changed

1 file changed

+16
-19
lines changed

src/serial.rs

Lines changed: 16 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -369,54 +369,51 @@ where
369369
// over -- regarding reception, we assume that the caller -- with
370370
// exclusive access to the Serial instance due to &mut self -- knows
371371
// what they're doing.
372-
if self.usart.sr.read().tc().bit_is_clear() {
373-
return nb::Result::Err(nb::Error::WouldBlock);
374-
}
372+
self.tx.flush()?;
375373
Self::apply_config(&self.usart, config.into(), clocks);
376-
nb::Result::Ok(())
374+
Ok(())
377375
}
378376

379377
/// Starts listening to the USART by enabling the _Received data
380378
/// ready to be read (RXNE)_ interrupt and _Transmit data
381379
/// register empty (TXE)_ interrupt
382380
pub fn listen(&mut self, event: Event) {
383-
self.usart.cr1.modify(|_, w| match event {
384-
Event::Rxne => w.rxneie().set_bit(),
385-
Event::Txe => w.txeie().set_bit(),
386-
Event::Idle => w.idleie().set_bit(),
387-
});
381+
match event {
382+
Event::Rxne => self.rx.listen(),
383+
Event::Txe => self.tx.listen(),
384+
Event::Idle => self.rx.listen_idle(),
385+
}
388386
}
389387

390388
/// Stops listening to the USART by disabling the _Received data
391389
/// ready to be read (RXNE)_ interrupt and _Transmit data
392390
/// register empty (TXE)_ interrupt
393391
pub fn unlisten(&mut self, event: Event) {
394-
self.usart.cr1.modify(|_, w| match event {
395-
Event::Rxne => w.rxneie().clear_bit(),
396-
Event::Txe => w.txeie().clear_bit(),
397-
Event::Idle => w.idleie().clear_bit(),
398-
});
392+
match event {
393+
Event::Rxne => self.rx.unlisten(),
394+
Event::Txe => self.tx.unlisten(),
395+
Event::Idle => self.rx.unlisten_idle(),
396+
}
399397
}
400398

401399
/// Returns true if the line idle status is set
402400
pub fn is_idle(&self) -> bool {
403-
self.usart.sr.read().idle().bit_is_set()
401+
self.rx.is_idle()
404402
}
405403

406404
/// Returns true if the tx register is empty (and can accept data)
407405
pub fn is_tx_empty(&self) -> bool {
408-
self.usart.sr.read().txe().bit_is_set()
406+
self.tx.is_tx_empty()
409407
}
410408

411409
/// Returns true if the rx register is not empty (and can be read)
412410
pub fn is_rx_not_empty(&self) -> bool {
413-
self.usart.sr.read().rxne().bit_is_set()
411+
self.rx.is_rx_not_empty()
414412
}
415413

416414
/// Clear idle line interrupt flag
417415
pub fn clear_idle_interrupt(&self) {
418-
let _ = self.usart.sr.read();
419-
let _ = self.usart.dr.read();
416+
self.rx.clear_idle_interrupt();
420417
}
421418

422419
/// Returns ownership of the borrowed register handles

0 commit comments

Comments
 (0)