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Use max frequency and round down when calculating PCLK1 (#365)
When pclk1 is not set use hclk or 36 MHz to stay below the max frequency of PCLK1. Also round up when calculating the prescaler so that the given pclk1 value is not exceeded.
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CHANGELOG.md

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@@ -53,6 +53,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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- Renamed `serial`'s `RxDma`/`TxDma`'s `split` method into `release`
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- Renamed I2C's `free` method into `release`
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- Enable SPI DMA in `with_tx_dma`, not in `SpiTxDma::start`
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- Use maximum frequency of 36 MHz on PCLK1
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- Round up when calculating the PCLK1 prescaler
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## [v0.7.0]- 2020-10-17
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src/rcc.rs

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@@ -230,17 +230,15 @@ impl CFGR {
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assert!(hclk <= 72_000_000);
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let ppre1_bits = self
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.pclk1
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.map(|pclk1| match hclk / pclk1 {
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0 => unreachable!(),
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1 => 0b011,
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2 => 0b100,
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3..=5 => 0b101,
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6..=11 => 0b110,
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_ => 0b111,
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})
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.unwrap_or(0b011);
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let pclk1 = self.pclk1.unwrap_or_else(|| cmp::min(hclk, 36_000_000));
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let ppre1_bits = match (hclk + pclk1 - 1) / pclk1 {
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0 => unreachable!(),
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1 => 0b011,
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2 => 0b100,
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3..=5 => 0b101,
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6..=11 => 0b110,
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_ => 0b111,
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};
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let ppre1 = 1 << (ppre1_bits - 0b011);
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let pclk1 = hclk / u32(ppre1);

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