@@ -66,6 +66,7 @@ impl Mode {
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}
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}
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+ /// Helper trait to ensure that the correct I2C pins are used for the corresponding interface
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pub trait Pins < I2C > {
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const REMAP : bool ;
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}
@@ -90,6 +91,7 @@ pub struct I2c<I2C, PINS> {
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pclk1 : u32 ,
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}
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+ /// embedded-hal compatible blocking I2C implementation
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pub struct BlockingI2c < I2C , PINS > {
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nb : I2c < I2C , PINS > ,
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start_timeout : u32 ,
@@ -99,6 +101,7 @@ pub struct BlockingI2c<I2C, PINS> {
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}
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impl < PINS > I2c < I2C1 , PINS > {
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+ /// Creates a generic I2C1 object on pins PB6 and PB7 or PB8 and PB9 (if remapped)
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pub fn i2c1 (
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i2c : I2C1 ,
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pins : PINS ,
@@ -116,6 +119,7 @@ impl<PINS> I2c<I2C1, PINS> {
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}
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impl < PINS > BlockingI2c < I2C1 , PINS > {
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+ /// Creates a blocking I2C1 object on pins PB6 and PB7 or PB8 and PB9 using the embedded-hal `BlockingI2c` trait.
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pub fn i2c1 (
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i2c : I2C1 ,
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pins : PINS ,
@@ -147,6 +151,7 @@ impl<PINS> BlockingI2c<I2C1, PINS> {
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}
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impl < PINS > I2c < I2C2 , PINS > {
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+ /// Creates a generic I2C2 object on pins PB10 and PB11 using the embedded-hal `BlockingI2c` trait.
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pub fn i2c2 (
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i2c : I2C2 ,
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pins : PINS ,
@@ -162,6 +167,7 @@ impl<PINS> I2c<I2C2, PINS> {
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}
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impl < PINS > BlockingI2c < I2C2 , PINS > {
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+ /// Creates a blocking I2C2 object on pins PB10 and PB1
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pub fn i2c2 (
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i2c : I2C2 ,
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pins : PINS ,
@@ -190,7 +196,8 @@ impl<PINS> BlockingI2c<I2C2, PINS> {
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}
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}
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- pub fn blocking_i2c < I2C , PINS > (
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+ /// Generates a blocking I2C instance from a universal I2C object
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+ fn blocking_i2c < I2C , PINS > (
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i2c : I2c < I2C , PINS > ,
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clocks : Clocks ,
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start_timeout_us : u32 ,
@@ -253,12 +260,13 @@ macro_rules! busy_wait_cycles {
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} } ;
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}
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+ // Generate the same code for both I2Cs
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macro_rules! hal {
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( $( $I2CX: ident: ( $i2cX: ident) , ) +) => {
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$(
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impl <PINS > I2c <$I2CX, PINS > {
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/// Configures the I2C peripheral to work in master mode
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- pub fn $i2cX(
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+ fn $i2cX(
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i2c: $I2CX,
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pins: PINS ,
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mode: Mode ,
@@ -277,6 +285,8 @@ macro_rules! hal {
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i2c
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}
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+ /// Initializes I2C. Configures the `I2C_TRISE`, `I2C_CRX`, and `I2C_CCR` registers
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+ /// according to the system frequency and I2C mode.
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fn init( & mut self ) {
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let freq = self . mode. get_frequency( ) ;
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let pclk1_mhz = ( self . pclk1 / 1000000 ) as u16 ;
@@ -316,20 +326,28 @@ macro_rules! hal {
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self . i2c. cr1. modify( |_, w| w. pe( ) . set_bit( ) ) ;
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}
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+ /// Perform an I2C software reset
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fn reset( & mut self ) {
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self . i2c. cr1. write( |w| w. pe( ) . set_bit( ) . swrst( ) . set_bit( ) ) ;
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self . i2c. cr1. reset( ) ;
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self . init( ) ;
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}
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+ /// Generate START condition
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fn send_start( & mut self ) {
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self . i2c. cr1. modify( |_, w| w. start( ) . set_bit( ) ) ;
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}
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+ /// Check if START condition is generated. If the condition is not generated, this
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+ /// method returns `WouldBlock` so the program can act accordingly
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+ /// (busy wait, async, ...)
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fn wait_after_sent_start( & mut self ) -> NbResult <( ) , Error > {
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wait_for_flag!( self . i2c, sb)
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}
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+ /// Check if STOP condition is generated. If the condition is not generated, this
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+ /// method returns `WouldBlock` so the program can act accordingly
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+ /// (busy wait, async, ...)
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fn wait_for_stop( & mut self ) -> NbResult <( ) , Error > {
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if self . i2c. cr1. read( ) . stop( ) . is_no_stop( ) {
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Ok ( ( ) )
@@ -338,10 +356,13 @@ macro_rules! hal {
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}
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}
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+ /// Sends the (7-Bit) address on the I2C bus. The 8th bit on the bus is set
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+ /// depending on wether it is a read or write transfer.
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fn send_addr( & self , addr: u8 , read: bool ) {
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self . i2c. dr. write( |w| { w. dr( ) . bits( addr << 1 | ( if read { 1 } else { 0 } ) ) } ) ;
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}
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+ /// Generate STOP condition
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fn send_stop( & self ) {
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self . i2c. cr1. modify( |_, w| w. stop( ) . set_bit( ) ) ;
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}
@@ -353,7 +374,7 @@ macro_rules! hal {
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}
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impl <PINS > BlockingI2c <$I2CX, PINS > {
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- pub fn $i2cX(
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+ fn $i2cX(
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i2c: $I2CX,
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pins: PINS ,
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mode: Mode ,
@@ -371,7 +392,7 @@ macro_rules! hal {
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fn send_start_and_wait( & mut self ) -> NbResult <( ) , Error > {
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// According to http://www.st.com/content/ccc/resource/technical/document/errata_sheet/f5/50/c9/46/56/db/4a/f6/CD00197763.pdf/files/CD00197763.pdf/jcr:content/translations/en.CD00197763.pdf
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- // 2.14.4 Wrong behavior of I2C peripheral in master mode after a misplaced Stop
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+ // 2.14.4 Wrong behavior of I2C peripheral in master mode after a misplaced STOP
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let mut retries_left = self . start_retries;
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let mut last_ret: NbResult <( ) , Error > = Err ( WouldBlock ) ;
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while retries_left > 0 {
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