Skip to content

Commit 01a6d0c

Browse files
burrbullburrbull
authored
Merge pull request #500 from stm32-rs/macro
simplify serialdma macro
2 parents 0da0af4 + 02f4efb commit 01a6d0c

File tree

1 file changed

+174
-165
lines changed

1 file changed

+174
-165
lines changed

‎src/serial.rs

Lines changed: 174 additions & 165 deletions
Original file line numberDiff line numberDiff line change
@@ -660,197 +660,206 @@ pub type Tx3 = Tx<USART3>;
660660
use crate::dma::{Receive, TransferPayload, Transmit};
661661

662662
macro_rules! serialdma {
663-
($(
664-
$USARTX:ident: (
665-
$rxdma:ident,
666-
$txdma:ident,
667-
$dmarxch:ty,
668-
$dmatxch:ty,
669-
),
670-
)+) => {
671-
$(
672-
pub type $rxdma = RxDma<Rx<$USARTX>, $dmarxch>;
673-
pub type $txdma = TxDma<Tx<$USARTX>, $dmatxch>;
663+
(
664+
$USARTX:ident,
665+
$rxdma:ident,
666+
$txdma:ident,
667+
$dmarxch:ty,
668+
$dmatxch:ty
669+
) => {
670+
pub type $rxdma = RxDma<Rx<$USARTX>, $dmarxch>;
671+
pub type $txdma = TxDma<Tx<$USARTX>, $dmatxch>;
672+
673+
impl Receive for $rxdma {
674+
type RxChannel = $dmarxch;
675+
type TransmittedWord = u8;
676+
}
674677

675-
impl Receive for $rxdma {
676-
type RxChannel = $dmarxch;
677-
type TransmittedWord = u8;
678-
}
678+
impl Transmit for $txdma {
679+
type TxChannel = $dmatxch;
680+
type ReceivedWord = u8;
681+
}
679682

680-
impl Transmit for $txdma {
681-
type TxChannel = $dmatxch;
682-
type ReceivedWord = u8;
683+
impl TransferPayload for $rxdma {
684+
fn start(&mut self) {
685+
self.channel.start();
683686
}
687+
fn stop(&mut self) {
688+
self.channel.stop();
689+
}
690+
}
684691

685-
impl TransferPayload for $rxdma {
686-
fn start(&mut self) {
687-
self.channel.start();
688-
}
689-
fn stop(&mut self) {
690-
self.channel.stop();
691-
}
692+
impl TransferPayload for $txdma {
693+
fn start(&mut self) {
694+
self.channel.start();
692695
}
696+
fn stop(&mut self) {
697+
self.channel.stop();
698+
}
699+
}
693700

694-
impl TransferPayload for $txdma {
695-
fn start(&mut self) {
696-
self.channel.start();
701+
impl Rx<$USARTX> {
702+
pub fn with_dma(self, channel: $dmarxch) -> $rxdma {
703+
unsafe {
704+
(*$USARTX::ptr()).cr3.modify(|_, w| w.dmar().set_bit());
697705
}
698-
fn stop(&mut self) {
699-
self.channel.stop();
706+
RxDma {
707+
payload: self,
708+
channel,
700709
}
701710
}
711+
}
702712

703-
impl Rx<$USARTX> {
704-
pub fn with_dma(self, channel: $dmarxch) -> $rxdma {
705-
unsafe { (*$USARTX::ptr()).cr3.modify(|_, w| w.dmar().set_bit()); }
706-
RxDma {
707-
payload: self,
708-
channel,
709-
}
713+
impl Tx<$USARTX> {
714+
pub fn with_dma(self, channel: $dmatxch) -> $txdma {
715+
unsafe {
716+
(*$USARTX::ptr()).cr3.modify(|_, w| w.dmat().set_bit());
710717
}
711-
}
712-
713-
impl Tx<$USARTX> {
714-
pub fn with_dma(self, channel: $dmatxch) -> $txdma {
715-
unsafe { (*$USARTX::ptr()).cr3.modify(|_, w| w.dmat().set_bit()); }
716-
TxDma {
717-
payload: self,
718-
channel,
719-
}
718+
TxDma {
719+
payload: self,
720+
channel,
720721
}
721722
}
723+
}
722724

723-
impl $rxdma {
724-
pub fn release(mut self) -> (Rx<$USARTX>, $dmarxch) {
725-
self.stop();
726-
unsafe { (*$USARTX::ptr()).cr3.modify(|_, w| w.dmar().clear_bit()); }
727-
let RxDma {payload, channel} = self;
728-
(
729-
payload,
730-
channel
731-
)
725+
impl $rxdma {
726+
pub fn release(mut self) -> (Rx<$USARTX>, $dmarxch) {
727+
self.stop();
728+
unsafe {
729+
(*$USARTX::ptr()).cr3.modify(|_, w| w.dmar().clear_bit());
732730
}
731+
let RxDma { payload, channel } = self;
732+
(payload, channel)
733733
}
734+
}
734735

735-
impl $txdma {
736-
pub fn release(mut self) -> (Tx<$USARTX>, $dmatxch) {
737-
self.stop();
738-
unsafe { (*$USARTX::ptr()).cr3.modify(|_, w| w.dmat().clear_bit()); }
739-
let TxDma {payload, channel} = self;
740-
(
741-
payload,
742-
channel,
743-
)
736+
impl $txdma {
737+
pub fn release(mut self) -> (Tx<$USARTX>, $dmatxch) {
738+
self.stop();
739+
unsafe {
740+
(*$USARTX::ptr()).cr3.modify(|_, w| w.dmat().clear_bit());
744741
}
742+
let TxDma { payload, channel } = self;
743+
(payload, channel)
745744
}
745+
}
746746

747-
impl<B> crate::dma::CircReadDma<B, u8> for $rxdma
748-
where
749-
&'static mut [B; 2]: WriteBuffer<Word = u8>,
750-
B: 'static,
751-
{
752-
fn circ_read(mut self, mut buffer: &'static mut [B; 2]) -> CircBuffer<B, Self> {
753-
// NOTE(unsafe) We own the buffer now and we won't call other `&mut` on it
754-
// until the end of the transfer.
755-
let (ptr, len) = unsafe { buffer.write_buffer() };
756-
self.channel.set_peripheral_address(unsafe{ &(*$USARTX::ptr()).dr as *const _ as u32 }, false);
757-
self.channel.set_memory_address(ptr as u32, true);
758-
self.channel.set_transfer_length(len);
759-
760-
atomic::compiler_fence(Ordering::Release);
761-
762-
self.channel.ch().cr.modify(|_, w| {
763-
w.mem2mem().clear_bit();
764-
w.pl().medium();
765-
w.msize().bits8();
766-
w.psize().bits8();
767-
w.circ().set_bit();
768-
w.dir().clear_bit()
769-
});
770-
771-
self.start();
772-
773-
CircBuffer::new(buffer, self)
774-
}
747+
impl<B> crate::dma::CircReadDma<B, u8> for $rxdma
748+
where
749+
&'static mut [B; 2]: WriteBuffer<Word = u8>,
750+
B: 'static,
751+
{
752+
fn circ_read(mut self, mut buffer: &'static mut [B; 2]) -> CircBuffer<B, Self> {
753+
// NOTE(unsafe) We own the buffer now and we won't call other `&mut` on it
754+
// until the end of the transfer.
755+
let (ptr, len) = unsafe { buffer.write_buffer() };
756+
self.channel.set_peripheral_address(
757+
unsafe { &(*$USARTX::ptr()).dr as *const _ as u32 },
758+
false,
759+
);
760+
self.channel.set_memory_address(ptr as u32, true);
761+
self.channel.set_transfer_length(len);
762+
763+
atomic::compiler_fence(Ordering::Release);
764+
765+
self.channel.ch().cr.modify(|_, w| {
766+
w.mem2mem().clear_bit();
767+
w.pl().medium();
768+
w.msize().bits8();
769+
w.psize().bits8();
770+
w.circ().set_bit();
771+
w.dir().clear_bit()
772+
});
773+
774+
self.start();
775+
776+
CircBuffer::new(buffer, self)
775777
}
778+
}
776779

777-
impl<B> crate::dma::ReadDma<B, u8> for $rxdma
778-
where
779-
B: WriteBuffer<Word = u8>,
780-
{
781-
fn read(mut self, mut buffer: B) -> Transfer<W, B, Self> {
782-
// NOTE(unsafe) We own the buffer now and we won't call other `&mut` on it
783-
// until the end of the transfer.
784-
let (ptr, len) = unsafe { buffer.write_buffer() };
785-
self.channel.set_peripheral_address(unsafe{ &(*$USARTX::ptr()).dr as *const _ as u32 }, false);
786-
self.channel.set_memory_address(ptr as u32, true);
787-
self.channel.set_transfer_length(len);
788-
789-
atomic::compiler_fence(Ordering::Release);
790-
self.channel.ch().cr.modify(|_, w| {
791-
w.mem2mem().clear_bit();
792-
w.pl().medium();
793-
w.msize().bits8();
794-
w.psize().bits8();
795-
w.circ().clear_bit();
796-
w.dir().clear_bit()
797-
});
798-
self.start();
799-
800-
Transfer::w(buffer, self)
801-
}
780+
impl<B> crate::dma::ReadDma<B, u8> for $rxdma
781+
where
782+
B: WriteBuffer<Word = u8>,
783+
{
784+
fn read(mut self, mut buffer: B) -> Transfer<W, B, Self> {
785+
// NOTE(unsafe) We own the buffer now and we won't call other `&mut` on it
786+
// until the end of the transfer.
787+
let (ptr, len) = unsafe { buffer.write_buffer() };
788+
self.channel.set_peripheral_address(
789+
unsafe { &(*$USARTX::ptr()).dr as *const _ as u32 },
790+
false,
791+
);
792+
self.channel.set_memory_address(ptr as u32, true);
793+
self.channel.set_transfer_length(len);
794+
795+
atomic::compiler_fence(Ordering::Release);
796+
self.channel.ch().cr.modify(|_, w| {
797+
w.mem2mem().clear_bit();
798+
w.pl().medium();
799+
w.msize().bits8();
800+
w.psize().bits8();
801+
w.circ().clear_bit();
802+
w.dir().clear_bit()
803+
});
804+
self.start();
805+
806+
Transfer::w(buffer, self)
802807
}
808+
}
803809

804-
impl<B> crate::dma::WriteDma<B, u8> for $txdma
805-
where
806-
B: ReadBuffer<Word = u8>,
807-
{
808-
fn write(mut self, buffer: B) -> Transfer<R, B, Self> {
809-
// NOTE(unsafe) We own the buffer now and we won't call other `&mut` on it
810-
// until the end of the transfer.
811-
let (ptr, len) = unsafe { buffer.read_buffer() };
812-
813-
self.channel.set_peripheral_address(unsafe{ &(*$USARTX::ptr()).dr as *const _ as u32 }, false);
814-
815-
self.channel.set_memory_address(ptr as u32, true);
816-
self.channel.set_transfer_length(len);
817-
818-
atomic::compiler_fence(Ordering::Release);
819-
820-
self.channel.ch().cr.modify(|_, w| {
821-
w.mem2mem().clear_bit();
822-
w.pl().medium();
823-
w.msize().bits8();
824-
w.psize().bits8();
825-
w.circ().clear_bit();
826-
w.dir().set_bit()
827-
});
828-
self.start();
829-
830-
Transfer::r(buffer, self)
831-
}
810+
impl<B> crate::dma::WriteDma<B, u8> for $txdma
811+
where
812+
B: ReadBuffer<Word = u8>,
813+
{
814+
fn write(mut self, buffer: B) -> Transfer<R, B, Self> {
815+
// NOTE(unsafe) We own the buffer now and we won't call other `&mut` on it
816+
// until the end of the transfer.
817+
let (ptr, len) = unsafe { buffer.read_buffer() };
818+
819+
self.channel.set_peripheral_address(
820+
unsafe { &(*$USARTX::ptr()).dr as *const _ as u32 },
821+
false,
822+
);
823+
824+
self.channel.set_memory_address(ptr as u32, true);
825+
self.channel.set_transfer_length(len);
826+
827+
atomic::compiler_fence(Ordering::Release);
828+
829+
self.channel.ch().cr.modify(|_, w| {
830+
w.mem2mem().clear_bit();
831+
w.pl().medium();
832+
w.msize().bits8();
833+
w.psize().bits8();
834+
w.circ().clear_bit();
835+
w.dir().set_bit()
836+
});
837+
self.start();
838+
839+
Transfer::r(buffer, self)
832840
}
833-
)+
834-
}
841+
}
842+
};
835843
}
836844

837845
serialdma! {
838-
USART1: (
839-
RxDma1,
840-
TxDma1,
841-
dma1::C5,
842-
dma1::C4,
843-
),
844-
USART2: (
845-
RxDma2,
846-
TxDma2,
847-
dma1::C6,
848-
dma1::C7,
849-
),
850-
USART3: (
851-
RxDma3,
852-
TxDma3,
853-
dma1::C3,
854-
dma1::C2,
855-
),
846+
USART1,
847+
RxDma1,
848+
TxDma1,
849+
dma1::C5,
850+
dma1::C4
851+
}
852+
serialdma! {
853+
USART2,
854+
RxDma2,
855+
TxDma2,
856+
dma1::C6,
857+
dma1::C7
858+
}
859+
serialdma! {
860+
USART3,
861+
RxDma3,
862+
TxDma3,
863+
dma1::C3,
864+
dma1::C2
856865
}

0 commit comments

Comments
 (0)