From e6db427c09e5c95c72647cae3fee6c3f253f0327 Mon Sep 17 00:00:00 2001 From: Jesse Braham Date: Wed, 9 Jan 2019 22:14:29 -0800 Subject: [PATCH 1/4] Add support for stm32f031 --- Cargo.toml | 3 ++- src/adc.rs | 21 ++++++++++++++++++--- src/gpio.rs | 10 ++++++++-- src/i2c.rs | 10 ++++++++-- src/lib.rs | 2 +- src/serial.rs | 9 +++++++-- src/timers.rs | 7 ++++++- 7 files changed, 50 insertions(+), 12 deletions(-) diff --git a/Cargo.toml b/Cargo.toml index 5cf3bbe..75bfa6d 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -46,12 +46,13 @@ panic-halt = "0.2.0" [features] device-selected = [] rt = ["stm32f0/rt"] -stm32f042 = ["stm32f0/stm32f0x2", "device-selected"] stm32f030 = ["stm32f0/stm32f0x0", "device-selected"] stm32f030x4 = ["stm32f030x6"] stm32f030x6 = ["stm32f030"] stm32f030x8 = ["stm32f030"] stm32f030xc = ["stm32f030"] +stm32f031 = ["stm32f0/stm32f0x1", "device-selected"] +stm32f042 = ["stm32f0/stm32f0x2", "device-selected"] stm32f070 = ["stm32f0/stm32f0x0", "device-selected"] stm32f070x6 = ["stm32f070"] stm32f070xb = ["stm32f070"] diff --git a/src/adc.rs b/src/adc.rs index cdc7aa5..7bd4085 100644 --- a/src/adc.rs +++ b/src/adc.rs @@ -350,17 +350,32 @@ impl VRef { } } -#[cfg(any(feature = "stm32f042", feature = "stm32f072", feature = "stm32f091"))] +#[cfg(any( + feature = "stm32f031", + feature = "stm32f042", + feature = "stm32f072", + feature = "stm32f091", +))] #[derive(Debug, Default)] /// Battery reference voltage (ADC Channel 18) pub struct VBat; -#[cfg(any(feature = "stm32f042", feature = "stm32f072", feature = "stm32f091"))] +#[cfg(any( + feature = "stm32f031", + feature = "stm32f042", + feature = "stm32f072", + feature = "stm32f091", +))] adc_pins!( VBat => 18_u8, ); -#[cfg(any(feature = "stm32f042", feature = "stm32f072", feature = "stm32f091"))] +#[cfg(any( + feature = "stm32f031", + feature = "stm32f042", + feature = "stm32f072", + feature = "stm32f091", +))] impl VBat { /// Init a new VBat pub fn new() -> Self { diff --git a/src/gpio.rs b/src/gpio.rs index f8c40a6..59ee0f4 100644 --- a/src/gpio.rs +++ b/src/gpio.rs @@ -654,8 +654,14 @@ gpio!(GPIOF, gpiof, iopfen, PF, [ PF1: (pf1, 1, Input), PF4: (pf4, 4, Input), PF5: (pf5, 5, Input), - PF6: (pf6, 5, Input), - PF7: (pf7, 5, Input), + PF6: (pf6, 6, Input), + PF7: (pf7, 7, Input), +]); + +#[cfg(feature = "stm32f031")] +gpio!(GPIOF, gpiof, iopfen, PF, [ + PF6: (pf6, 6, Input), + PF7: (pf7, 7, Input), ]); #[cfg(feature = "stm32f070")] diff --git a/src/i2c.rs b/src/i2c.rs index bba521e..217e29c 100644 --- a/src/i2c.rs +++ b/src/i2c.rs @@ -43,6 +43,7 @@ i2c_pins! { #[cfg(any( feature = "stm32f030x6", feature = "stm32f030xc", + feature = "stm32f031", feature = "stm32f042", feature = "stm32f091", ))] @@ -52,7 +53,7 @@ i2c_pins! { sda => [gpioa::PA10>], } } -#[cfg(any(feature = "stm32f042", feature = "stm32f030x6"))] +#[cfg(any(feature = "stm32f031", feature = "stm32f042", feature = "stm32f030x6"))] i2c_pins! { I2C1 => { scl => [gpiob::PB10>], @@ -66,7 +67,12 @@ i2c_pins! { sda => [gpiob::PB14>, gpiof::PF0>], } } -#[cfg(any(feature = "stm32f070", feature = "stm32f072", feature = "stm32f091"))] +#[cfg(any( + feature = "stm32f031", + feature = "stm32f070", + feature = "stm32f072", + feature = "stm32f091", +))] i2c_pins! { I2C1 => { scl => [gpiob::PB6>, gpiob::PB8>], diff --git a/src/lib.rs b/src/lib.rs index abc82b6..0010368 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -6,7 +6,7 @@ pub use stm32f0; #[cfg(any(feature = "stm32f030", feature = "stm32f070"))] pub use stm32f0::stm32f0x0 as stm32; -#[cfg(feature = "stm32f091")] +#[cfg(any(feature = "stm32f031", feature = "stm32f091"))] pub use stm32f0::stm32f0x1 as stm32; #[cfg(any(feature = "stm32f042", feature = "stm32f072"))] diff --git a/src/serial.rs b/src/serial.rs index 1e8fbb1..70dc65f 100644 --- a/src/serial.rs +++ b/src/serial.rs @@ -92,14 +92,19 @@ usart_pins! { rx => [gpioa::PA10>, gpiob::PB6>], } } -#[cfg(feature = "stm32f030x6")] +#[cfg(any(feature = "stm32f031", feature = "stm32f030x6"))] usart_pins! { USART1 => { tx => [gpioa::PA2>, gpioa::PA14>], rx => [gpioa::PA3>, gpioa::PA15>], } } -#[cfg(any(feature = "stm32f070", feature = "stm32f072", feature = "stm32f091"))] +#[cfg(any( + feature = "stm32f031", + feature = "stm32f070", + feature = "stm32f072", + feature = "stm32f091", +))] usart_pins! { USART1 => { tx => [gpioa::PA9>, gpiob::PB6>], diff --git a/src/timers.rs b/src/timers.rs index 42c9c6e..c4d2029 100644 --- a/src/timers.rs +++ b/src/timers.rs @@ -244,7 +244,12 @@ timers! { TIM7: (tim7, tim7en, tim7rst, apb1enr, apb1rstr), } -#[cfg(any(feature = "stm32f042", feature = "stm32f072", feature = "stm32f091"))] +#[cfg(any( + feature = "stm32f031", + feature = "stm32f042", + feature = "stm32f072", + feature = "stm32f091", +))] timers! { TIM2: (tim2, tim2en, tim2rst, apb1enr, apb1rstr), } From b016ffdfe9d6705cc113697fe1b078715cf3ff98 Mon Sep 17 00:00:00 2001 From: Jesse Braham Date: Thu, 10 Jan 2019 17:13:00 -0800 Subject: [PATCH 2/4] Add support for stm32f051 --- Cargo.toml | 1 + src/adc.rs | 4 ++++ src/gpio.rs | 5 +++-- src/i2c.rs | 6 +++--- src/lib.rs | 2 +- src/serial.rs | 5 ++++- src/spi.rs | 2 ++ src/timers.rs | 2 ++ 8 files changed, 20 insertions(+), 7 deletions(-) diff --git a/Cargo.toml b/Cargo.toml index 75bfa6d..7540b6e 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -53,6 +53,7 @@ stm32f030x8 = ["stm32f030"] stm32f030xc = ["stm32f030"] stm32f031 = ["stm32f0/stm32f0x1", "device-selected"] stm32f042 = ["stm32f0/stm32f0x2", "device-selected"] +stm32f051 = ["stm32f0/stm32f0x1", "device-selected"] stm32f070 = ["stm32f0/stm32f0x0", "device-selected"] stm32f070x6 = ["stm32f070"] stm32f070xb = ["stm32f070"] diff --git a/src/adc.rs b/src/adc.rs index 7bd4085..aca21e0 100644 --- a/src/adc.rs +++ b/src/adc.rs @@ -206,6 +206,7 @@ adc_pins!( #[cfg(any( feature = "stm32f030", + feature = "stm32f051", feature = "stm32f070", feature = "stm32f072", feature = "stm32f091" @@ -353,6 +354,7 @@ impl VRef { #[cfg(any( feature = "stm32f031", feature = "stm32f042", + feature = "stm32f051", feature = "stm32f072", feature = "stm32f091", ))] @@ -363,6 +365,7 @@ pub struct VBat; #[cfg(any( feature = "stm32f031", feature = "stm32f042", + feature = "stm32f051", feature = "stm32f072", feature = "stm32f091", ))] @@ -373,6 +376,7 @@ adc_pins!( #[cfg(any( feature = "stm32f031", feature = "stm32f042", + feature = "stm32f051", feature = "stm32f072", feature = "stm32f091", ))] diff --git a/src/gpio.rs b/src/gpio.rs index 59ee0f4..d91899a 100644 --- a/src/gpio.rs +++ b/src/gpio.rs @@ -570,6 +570,7 @@ gpio!(GPIOC, gpioc, iopcen, PC, [ #[cfg(any( feature = "stm32f030", + feature = "stm32f051", feature = "stm32f070", feature = "stm32f072", feature = "stm32f091", @@ -593,7 +594,7 @@ gpio!(GPIOC, gpioc, iopcen, PC, [ PC15: (pc15, 15, Input), ]); -#[cfg(any(feature = "stm32f030", feature = "stm32f070"))] +#[cfg(any(feature = "stm32f030", feature = "stm32f051", feature = "stm32f070"))] gpio!(GPIOD, gpiod, iopden, PD, [ PD2: (pd2, 2, Input), ]); @@ -648,7 +649,7 @@ gpio!(GPIOF, gpiof, iopfen, PF, [ PF11: (pf11, 11, Input), ]); -#[cfg(feature = "stm32f030")] +#[cfg(any(feature = "stm32f030", feature = "stm32f051"))] gpio!(GPIOF, gpiof, iopfen, PF, [ PF0: (pf0, 0, Input), PF1: (pf1, 1, Input), diff --git a/src/i2c.rs b/src/i2c.rs index 217e29c..143db71 100644 --- a/src/i2c.rs +++ b/src/i2c.rs @@ -69,6 +69,7 @@ i2c_pins! { } #[cfg(any( feature = "stm32f031", + feature = "stm32f051", feature = "stm32f070", feature = "stm32f072", feature = "stm32f091", @@ -94,7 +95,7 @@ i2c_pins! { } } -#[cfg(any(feature = "stm32f030x8"))] +#[cfg(any(feature = "stm32f030x8", feature = "stm32f051"))] i2c_pins! { I2C2 => { scl => [gpiob::PB10>], @@ -156,8 +157,7 @@ i2c! { #[cfg(any( feature = "stm32f030xc", - // XXX: This can't be right - feature = "stm32f030xc", + feature = "stm32f051", feature = "stm32f070xb", feature = "stm32f072", feature = "stm32f091", diff --git a/src/lib.rs b/src/lib.rs index 0010368..4773280 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -6,7 +6,7 @@ pub use stm32f0; #[cfg(any(feature = "stm32f030", feature = "stm32f070"))] pub use stm32f0::stm32f0x0 as stm32; -#[cfg(any(feature = "stm32f031", feature = "stm32f091"))] +#[cfg(any(feature = "stm32f031", feature = "stm32f051", feature = "stm32f091"))] pub use stm32f0::stm32f0x1 as stm32; #[cfg(any(feature = "stm32f042", feature = "stm32f072"))] diff --git a/src/serial.rs b/src/serial.rs index 70dc65f..04a0690 100644 --- a/src/serial.rs +++ b/src/serial.rs @@ -85,7 +85,7 @@ macro_rules! usart_pins { } } -#[cfg(any(feature = "stm32f030", feature = "stm32f042"))] +#[cfg(any(feature = "stm32f030", feature = "stm32f042", feature = "stm32f051"))] usart_pins! { USART1 => { tx => [gpioa::PA9>, gpiob::PB6>], @@ -111,10 +111,12 @@ usart_pins! { rx => [gpioa::PA10>, gpiob::PB7>], } } + #[cfg(any( feature = "stm32f030x8", feature = "stm32f030xc", feature = "stm32f042", + feature = "stm32f051", feature = "stm32f070", feature = "stm32f072", feature = "stm32f091", @@ -283,6 +285,7 @@ usart! { feature = "stm32f030x8", feature = "stm32f030xc", feature = "stm32f042", + feature = "stm32f051", feature = "stm32f070", feature = "stm32f072", feature = "stm32f091", diff --git a/src/spi.rs b/src/spi.rs index 947a43f..cc2f729 100644 --- a/src/spi.rs +++ b/src/spi.rs @@ -133,6 +133,7 @@ spi_pins! { #[cfg(any( feature = "stm32f030x8", feature = "stm32f030xc", + feature = "stm32f051", feature = "stm32f070xb", feature = "stm32f072", feature = "stm32f091", @@ -204,6 +205,7 @@ spi! { #[cfg(any( feature = "stm32f030x8", feature = "stm32f030xc", + feature = "stm32f051", feature = "stm32f070xb", feature = "stm32f091", ))] diff --git a/src/timers.rs b/src/timers.rs index c4d2029..76346ae 100644 --- a/src/timers.rs +++ b/src/timers.rs @@ -225,6 +225,7 @@ timers! { #[cfg(any( feature = "stm32f030x8", feature = "stm32f030xc", + feature = "stm32f051", feature = "stm32f070xb", feature = "stm32f072", feature = "stm32f091", @@ -247,6 +248,7 @@ timers! { #[cfg(any( feature = "stm32f031", feature = "stm32f042", + feature = "stm32f051", feature = "stm32f072", feature = "stm32f091", ))] From c4967c26456364fdf63e0636419cca2a9cc7b3a3 Mon Sep 17 00:00:00 2001 From: Jesse Braham Date: Thu, 10 Jan 2019 18:28:44 -0800 Subject: [PATCH 3/4] Add support for stm32f071 --- Cargo.toml | 1 + src/adc.rs | 4 ++++ src/gpio.rs | 7 ++++--- src/i2c.rs | 37 +++++++++++++++++++++---------------- src/lib.rs | 7 ++++++- src/serial.rs | 18 +++++++++++++++--- src/spi.rs | 8 ++++++-- src/timers.rs | 22 ++++++++++++---------- 8 files changed, 69 insertions(+), 35 deletions(-) diff --git a/Cargo.toml b/Cargo.toml index 7540b6e..88f1086 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -57,6 +57,7 @@ stm32f051 = ["stm32f0/stm32f0x1", "device-selected"] stm32f070 = ["stm32f0/stm32f0x0", "device-selected"] stm32f070x6 = ["stm32f070"] stm32f070xb = ["stm32f070"] +stm32f071 = ["stm32f0/stm32f0x1", "device-selected"] stm32f072 = ["stm32f0/stm32f0x2", "device-selected"] stm32f091 = ["stm32f0/stm32f0x1", "device-selected"] diff --git a/src/adc.rs b/src/adc.rs index aca21e0..63246e7 100644 --- a/src/adc.rs +++ b/src/adc.rs @@ -208,6 +208,7 @@ adc_pins!( feature = "stm32f030", feature = "stm32f051", feature = "stm32f070", + feature = "stm32f071", feature = "stm32f072", feature = "stm32f091" ))] @@ -355,6 +356,7 @@ impl VRef { feature = "stm32f031", feature = "stm32f042", feature = "stm32f051", + feature = "stm32f071", feature = "stm32f072", feature = "stm32f091", ))] @@ -366,6 +368,7 @@ pub struct VBat; feature = "stm32f031", feature = "stm32f042", feature = "stm32f051", + feature = "stm32f071", feature = "stm32f072", feature = "stm32f091", ))] @@ -377,6 +380,7 @@ adc_pins!( feature = "stm32f031", feature = "stm32f042", feature = "stm32f051", + feature = "stm32f071", feature = "stm32f072", feature = "stm32f091", ))] diff --git a/src/gpio.rs b/src/gpio.rs index d91899a..6d7be1d 100644 --- a/src/gpio.rs +++ b/src/gpio.rs @@ -572,6 +572,7 @@ gpio!(GPIOC, gpioc, iopcen, PC, [ feature = "stm32f030", feature = "stm32f051", feature = "stm32f070", + feature = "stm32f071", feature = "stm32f072", feature = "stm32f091", ))] @@ -599,7 +600,7 @@ gpio!(GPIOD, gpiod, iopden, PD, [ PD2: (pd2, 2, Input), ]); -#[cfg(any(feature = "stm32f072", feature = "stm32f091"))] +#[cfg(any(feature = "stm32f071", feature = "stm32f072", feature = "stm32f091"))] gpio!(GPIOD, gpiod, iopden, PD, [ PD0: (pd0, 0, Input), PD1: (pd1, 1, Input), @@ -622,7 +623,7 @@ gpio!(GPIOD, gpiod, iopden, PD, [ // TODO: The ST SVD files are missing the entire PE enable register. // Re-enable as soon as this gets fixed. -// #[cfg(any(feature = "stm32f072", feature = "stm32f091"))] +// #[cfg(any(feature = "stm32f071", feature = "stm32f072", feature = "stm32f091"))] // gpio!(GPIOE, gpioe, iopeen, PE, [ // PE0: (pe0, 0, Input), // PE1: (pe1, 1, Input), @@ -671,7 +672,7 @@ gpio!(GPIOF, gpiof, iopfen, PF, [ PF1: (pf1, 1, Input), ]); -#[cfg(any(feature = "stm32f072", feature = "stm32f091"))] +#[cfg(any(feature = "stm32f071", feature = "stm32f072", feature = "stm32f091"))] gpio!(GPIOF, gpiof, iopfen, PF, [ PF0: (pf0, 0, Input), PF1: (pf1, 1, Input), diff --git a/src/i2c.rs b/src/i2c.rs index 143db71..a56fe97 100644 --- a/src/i2c.rs +++ b/src/i2c.rs @@ -33,11 +33,20 @@ macro_rules! i2c_pins { } } -#[cfg(any(feature = "stm32f030", feature = "stm32f042"))] +#[cfg(any( + feature = "stm32f030", + feature = "stm32f031", + feature = "stm32f042", + feature = "stm32f051", + feature = "stm32f070", + feature = "stm32f071", + feature = "stm32f072", + feature = "stm32f091", +))] i2c_pins! { I2C1 => { - scl => [gpioa::PA11>, gpiob::PB6>, gpiob::PB8>], - sda => [gpioa::PA12>, gpiob::PB7>, gpiob::PB9>], + scl => [gpiob::PB6>, gpiob::PB8>], + sda => [gpiob::PB7>, gpiob::PB9>], } } #[cfg(any( @@ -53,6 +62,13 @@ i2c_pins! { sda => [gpioa::PA10>], } } +#[cfg(any(feature = "stm32f030", feature = "stm32f042"))] +i2c_pins! { + I2C1 => { + scl => [gpioa::PA11>], + sda => [gpioa::PA12>], + } +} #[cfg(any(feature = "stm32f031", feature = "stm32f042", feature = "stm32f030x6"))] i2c_pins! { I2C1 => { @@ -67,19 +83,6 @@ i2c_pins! { sda => [gpiob::PB14>, gpiof::PF0>], } } -#[cfg(any( - feature = "stm32f031", - feature = "stm32f051", - feature = "stm32f070", - feature = "stm32f072", - feature = "stm32f091", -))] -i2c_pins! { - I2C1 => { - scl => [gpiob::PB6>, gpiob::PB8>], - sda => [gpiob::PB7>, gpiob::PB9>], - } -} #[cfg(feature = "stm32f070x6")] i2c_pins! { I2C1 => { @@ -105,6 +108,7 @@ i2c_pins! { #[cfg(any( feature = "stm32f030xc", feature = "stm32f070xb", + feature = "stm32f071", feature = "stm32f072", feature = "stm32f091", ))] @@ -159,6 +163,7 @@ i2c! { feature = "stm32f030xc", feature = "stm32f051", feature = "stm32f070xb", + feature = "stm32f071", feature = "stm32f072", feature = "stm32f091", ))] diff --git a/src/lib.rs b/src/lib.rs index 4773280..cf36be8 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -6,7 +6,12 @@ pub use stm32f0; #[cfg(any(feature = "stm32f030", feature = "stm32f070"))] pub use stm32f0::stm32f0x0 as stm32; -#[cfg(any(feature = "stm32f031", feature = "stm32f051", feature = "stm32f091"))] +#[cfg(any( + feature = "stm32f031", + feature = "stm32f051", + feature = "stm32f071", + feature = "stm32f091", +))] pub use stm32f0::stm32f0x1 as stm32; #[cfg(any(feature = "stm32f042", feature = "stm32f072"))] diff --git a/src/serial.rs b/src/serial.rs index 04a0690..af7ebbd 100644 --- a/src/serial.rs +++ b/src/serial.rs @@ -85,7 +85,12 @@ macro_rules! usart_pins { } } -#[cfg(any(feature = "stm32f030", feature = "stm32f042", feature = "stm32f051"))] +#[cfg(any( + feature = "stm32f030", + feature = "stm32f042", + feature = "stm32f051", + feature = "stm32f071", +))] usart_pins! { USART1 => { tx => [gpioa::PA9>, gpiob::PB6>], @@ -118,6 +123,7 @@ usart_pins! { feature = "stm32f042", feature = "stm32f051", feature = "stm32f070", + feature = "stm32f071", feature = "stm32f072", feature = "stm32f091", ))] @@ -127,16 +133,18 @@ usart_pins! { rx => [gpioa::PA3>, gpioa::PA15>], } } -#[cfg(any(feature = "stm32f072", feature = "stm32f091"))] +#[cfg(any(feature = "stm32f072", feature = "stm32f071", feature = "stm32f091"))] usart_pins! { USART2 => { tx => [gpiod::PD5>], rx => [gpiod::PD6>], } } + #[cfg(any( feature = "stm32f030xc", feature = "stm32f070xb", + feature = "stm32f071", feature = "stm32f072", feature = "stm32f091", ))] @@ -151,13 +159,14 @@ usart_pins! { rx => [gpioa::PA1>, gpioc::PC11>], } } -#[cfg(any(feature = "stm32f072", feature = "stm32f091"))] +#[cfg(any(feature = "stm32f071", feature = "stm32f072", feature = "stm32f091"))] usart_pins! { USART3 => { tx => [gpiod::PD8>], rx => [gpiod::PD9>], } } + // TODO: The ST SVD files are missing the entire PE enable register. // Re-enable as soon as this gets fixed. // #[cfg(feature = "stm32f091")] @@ -167,6 +176,7 @@ usart_pins! { // rx => [gpioe::PE9>], // } // } + #[cfg(any(feature = "stm32f030xc", feature = "stm32f091"))] usart_pins! { USART5 => { @@ -287,6 +297,7 @@ usart! { feature = "stm32f042", feature = "stm32f051", feature = "stm32f070", + feature = "stm32f071", feature = "stm32f072", feature = "stm32f091", ))] @@ -296,6 +307,7 @@ usart! { #[cfg(any( feature = "stm32f030xc", feature = "stm32f070xb", + feature = "stm32f071", feature = "stm32f072", feature = "stm32f091", ))] diff --git a/src/spi.rs b/src/spi.rs index cc2f729..274a374 100644 --- a/src/spi.rs +++ b/src/spi.rs @@ -50,6 +50,7 @@ use crate::stm32::SPI1; feature = "stm32f030x8", feature = "stm32f030xc", feature = "stm32f070xb", + feature = "stm32f071", feature = "stm32f091", ))] use crate::stm32::SPI2; @@ -121,7 +122,7 @@ spi_pins! { // TODO: The ST SVD files are missing the entire PE enable register. // So those pins do not exist in the register definitions. // Re-enable as soon as this gets fixed. -// #[cfg(any(feature = "stm32f072", feature = "stm32f091"))] +// #[cfg(any(feature = "stm32f071", feature = "stm32f072", feature = "stm32f091"))] // spi_pins! { // SPI1 => { // sck => [gpioe::PE13>], @@ -135,6 +136,7 @@ spi_pins! { feature = "stm32f030xc", feature = "stm32f051", feature = "stm32f070xb", + feature = "stm32f071", feature = "stm32f072", feature = "stm32f091", ))] @@ -148,6 +150,7 @@ spi_pins! { #[cfg(any( feature = "stm32f030xc", feature = "stm32f070xb", + feature = "stm32f071", feature = "stm32f072", feature = "stm32f091", ))] @@ -158,7 +161,7 @@ spi_pins! { mosi => [gpioc::PC3>], } } -#[cfg(any(feature = "stm32f072", feature = "stm32f091"))] +#[cfg(any(feature = "stm32f071", feature = "stm32f072", feature = "stm32f091"))] spi_pins! { SPI2 => { sck => [gpiod::PD1>], @@ -207,6 +210,7 @@ spi! { feature = "stm32f030xc", feature = "stm32f051", feature = "stm32f070xb", + feature = "stm32f071", feature = "stm32f091", ))] spi! { diff --git a/src/timers.rs b/src/timers.rs index 76346ae..08e8018 100644 --- a/src/timers.rs +++ b/src/timers.rs @@ -223,35 +223,37 @@ timers! { } #[cfg(any( - feature = "stm32f030x8", - feature = "stm32f030xc", + feature = "stm32f031", + feature = "stm32f042", feature = "stm32f051", - feature = "stm32f070xb", + feature = "stm32f071", feature = "stm32f072", feature = "stm32f091", ))] timers! { - TIM6: (tim6, tim6en, tim6rst, apb1enr, apb1rstr), - TIM15: (tim15, tim15en, tim15rst, apb2enr, apb2rstr), + TIM2: (tim2, tim2en, tim2rst, apb1enr, apb1rstr), } #[cfg(any( + feature = "stm32f030x8", feature = "stm32f030xc", + feature = "stm32f051", feature = "stm32f070xb", + feature = "stm32f071", feature = "stm32f072", feature = "stm32f091", ))] timers! { - TIM7: (tim7, tim7en, tim7rst, apb1enr, apb1rstr), + TIM6: (tim6, tim6en, tim6rst, apb1enr, apb1rstr), + TIM15: (tim15, tim15en, tim15rst, apb2enr, apb2rstr), } #[cfg(any( - feature = "stm32f031", - feature = "stm32f042", - feature = "stm32f051", + feature = "stm32f030xc", + feature = "stm32f070xb", feature = "stm32f072", feature = "stm32f091", ))] timers! { - TIM2: (tim2, tim2en, tim2rst, apb1enr, apb1rstr), + TIM7: (tim7, tim7en, tim7rst, apb1enr, apb1rstr), } From ce2ef0d854e0c9aba7e90561e3e48853fad31a51 Mon Sep 17 00:00:00 2001 From: Jesse Braham Date: Thu, 10 Jan 2019 18:47:32 -0800 Subject: [PATCH 4/4] Fix build error, update CHANGELOG and README --- CHANGELOG.md | 4 ++-- README.md | 3 +++ src/spi.rs | 1 + 3 files changed, 6 insertions(+), 2 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 29d626e..ba25d5f 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -9,7 +9,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ### Added -- Support for STM32F091 - @jessebraham +- Support for stm32f0x1 line - @jessebraham - Support for HSE as a system clocksource (#25 - breaking change) - @zklapow ### Changed @@ -66,7 +66,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/). - Reworked GPIOs and added fully erased pins - Timer support -- Support for STM32F070 +- Support for STM32F070 - @jessebraham - Additional peripheral support for STM32F030 - Watchdog support diff --git a/README.md b/README.md index 80ee282..eb30196 100644 --- a/README.md +++ b/README.md @@ -18,8 +18,11 @@ Supported Configurations ------------------------ * __stm32f030__ (stm32f030x4, stm32f030x6, stm32f030x8, stm32f030xc) +* __stm32f031__ * __stm32f042__ +* __stm32f051__ * __stm32f070__ (stm32f070x6, stm32f070xb) +* __stm32f071__ * __stm32f072__ * __stm32f091__ diff --git a/src/spi.rs b/src/spi.rs index 274a374..7818871 100644 --- a/src/spi.rs +++ b/src/spi.rs @@ -49,6 +49,7 @@ use crate::stm32::SPI1; #[cfg(any( feature = "stm32f030x8", feature = "stm32f030xc", + feature = "stm32f051", feature = "stm32f070xb", feature = "stm32f071", feature = "stm32f091",