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david-sawatzkedavid-sawatzke
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Move pin af definitions to a universal pin_mappings file
For SPI & UART
1 parent 1924bb1 commit a6aa4b4

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4 files changed

+116
-134
lines changed

4 files changed

+116
-134
lines changed

‎src/lib.rs

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -13,6 +13,7 @@ pub mod adc;
1313
pub mod delay;
1414
pub mod gpio;
1515
pub mod i2c;
16+
pub mod pin_mappings;
1617
pub mod prelude;
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pub mod rcc;
1819
pub mod serial;

‎src/pin_mappings.rs

Lines changed: 111 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,111 @@
1+
#[cfg(feature = "device-selected")]
2+
use crate::gpio::gpioa::*;
3+
#[cfg(feature = "device-selected")]
4+
use crate::gpio::gpiob::*;
5+
#[allow(unused)]
6+
#[cfg(feature = "device-selected")]
7+
use crate::gpio::gpioc::*;
8+
#[cfg(feature = "stm32f030xc")]
9+
use crate::gpio::gpiod::*;
10+
#[allow(unused)]
11+
use crate::gpio::{Alternate, AF0, AF1, AF2, AF4, AF5};
12+
use crate::serial::*;
13+
use crate::spi::*;
14+
#[cfg(feature = "device-selected")]
15+
use crate::stm32::*;
16+
17+
macro_rules! pins {
18+
($($PIN:ident => {
19+
$($AF:ty: $TRAIT:ty),+
20+
}),+) => {
21+
$(
22+
$(
23+
impl $TRAIT for $PIN<Alternate<$AF>> {}
24+
)+
25+
)+
26+
}
27+
}
28+
29+
#[cfg(feature = "device-selected")]
30+
pins! {
31+
PA5 => {AF0: SckPin<SPI1>},
32+
PA6 => {AF0: MisoPin<SPI1>},
33+
PA7 => {AF0: MosiPin<SPI1>},
34+
PA9 => {AF1: TxPin<USART1>},
35+
PA10 => {AF1: RxPin<USART1>},
36+
PB3 => {AF0: SckPin<SPI1>},
37+
PB4 => {AF0: MisoPin<SPI1>},
38+
PB5 => {AF0: MosiPin<SPI1>},
39+
PB6 => {AF0: TxPin<USART1>},
40+
PB7 => {AF0: RxPin<USART1>}
41+
}
42+
43+
#[cfg(feature = "stm32f030x6")]
44+
pins! {
45+
PA2 => {AF1: TxPin<USART1>},
46+
PA3 => {AF1: RxPin<USART1>},
47+
PA14 => {AF1: TxPin<USART1>},
48+
PA15 => {AF1: RxPin<USART1>},
49+
PB13 => {AF0: SckPin<SPI1>},
50+
PB14 => {AF0: MisoPin<SPI1>},
51+
PB15 => {AF0: MosiPin<SPI1>}
52+
}
53+
54+
#[cfg(any(
55+
feature = "stm32f030x8",
56+
feature = "stm32f030xc",
57+
feature = "stm32f042",
58+
feature = "stm32f070",
59+
))]
60+
pins! {
61+
PA2 => {AF1: TxPin<USART2>},
62+
PA3 => {AF1: RxPin<USART2>},
63+
PA14 => {AF1: TxPin<USART2>},
64+
PA15 => {AF1: RxPin<USART2>}
65+
}
66+
67+
#[cfg(any(feature = "stm32f030xc", feature = "stm32f070xb"))]
68+
pins! {
69+
PA0 => {AF4: TxPin<USART4>},
70+
PA1 => {AF4: RxPin<USART4>},
71+
PB10 => {
72+
AF4: TxPin<USART3>,
73+
AF5: SckPin<SPI2>
74+
},
75+
PB11 => {AF4: RxPin<USART3>},
76+
PC2 => {AF1: MisoPin<SPI2>},
77+
PC3 => {AF1: MosiPin<SPI2>},
78+
PC4 => {AF1: TxPin<USART3>},
79+
PC5 => {AF1: RxPin<USART3>},
80+
PC10 => {
81+
AF0: TxPin<USART4>,
82+
AF1: TxPin<USART3>
83+
},
84+
PC11 => {
85+
AF0: RxPin<USART4>,
86+
AF1: RxPin<USART3>
87+
}
88+
}
89+
90+
#[cfg(feature = "stm32f030xc")]
91+
pins! {
92+
PA4 => {AF5: TxPin<USART6>},
93+
PA5 => {AF5: RxPin<USART6>},
94+
PB3 => {AF4: TxPin<USART5>},
95+
PB4 => {AF4: RxPin<USART5>},
96+
PC0 => {AF2: TxPin<USART6>},
97+
PC1 => {AF2: RxPin<USART6>},
98+
PC12 => {AF2: RxPin<USART5>},
99+
PD2 => {AF2: TxPin<USART5>}
100+
}
101+
102+
#[cfg(any(
103+
feature = "stm32f030x8",
104+
feature = "stm32f030xc",
105+
feature = "stm32f070xb"
106+
))]
107+
pins! {
108+
PB13 => {AF0: SckPin<SPI2>},
109+
PB14 => {AF0: MisoPin<SPI2>},
110+
PB15 => {AF0: MosiPin<SPI2>}
111+
}

‎src/serial.rs

Lines changed: 0 additions & 74 deletions
Original file line numberDiff line numberDiff line change
@@ -62,80 +62,6 @@ pub enum Error {
6262
pub trait TxPin<USART> {}
6363
pub trait RxPin<USART> {}
6464

65-
#[cfg(feature = "device-selected")]
66-
macro_rules! usart_pins {
67-
($($USART:ident => {
68-
tx => [$($tx:ty),+ $(,)*],
69-
rx => [$($rx:ty),+ $(,)*],
70-
})+) => {
71-
$(
72-
$(
73-
impl TxPin<crate::stm32::$USART> for $tx {}
74-
)+
75-
$(
76-
impl RxPin<crate::stm32::$USART> for $rx {}
77-
)+
78-
)+
79-
}
80-
}
81-
82-
#[cfg(any(feature = "stm32f030", feature = "stm32f042"))]
83-
usart_pins! {
84-
USART1 => {
85-
tx => [gpioa::PA9<Alternate<AF1>>, gpiob::PB6<Alternate<AF0>>],
86-
rx => [gpioa::PA10<Alternate<AF1>>, gpiob::PB6<Alternate<AF0>>],
87-
}
88-
}
89-
#[cfg(feature = "stm32f030x6")]
90-
usart_pins! {
91-
USART1 => {
92-
tx => [gpioa::PA2<Alternate<AF1>>, gpioa::PA14<Alternate<AF1>>],
93-
rx => [gpioa::PA3<Alternate<AF1>>, gpioa::PA15<Alternate<AF1>>],
94-
}
95-
}
96-
#[cfg(feature = "stm32f070")]
97-
usart_pins! {
98-
USART1 => {
99-
tx => [gpioa::PA9<Alternate<AF1>>, gpiob::PB6<Alternate<AF0>>],
100-
rx => [gpioa::PA10<Alternate<AF1>>, gpiob::PB7<Alternate<AF0>>],
101-
}
102-
}
103-
#[cfg(any(
104-
feature = "stm32f030x8",
105-
feature = "stm32f030xc",
106-
feature = "stm32f042",
107-
feature = "stm32f070",
108-
))]
109-
usart_pins! {
110-
USART2 => {
111-
tx => [gpioa::PA2<Alternate<AF1>>, gpioa::PA14<Alternate<AF1>>],
112-
rx => [gpioa::PA3<Alternate<AF1>>, gpioa::PA15<Alternate<AF1>>],
113-
}
114-
}
115-
#[cfg(any(feature = "stm32f030xc", feature = "stm32f070xb"))]
116-
usart_pins! {
117-
USART3 => {
118-
// According to the datasheet PB10 is both tx and rx, but in stm32cubemx it's only tx
119-
tx => [gpiob::PB10<Alternate<AF4>>, gpioc::PC4<Alternate<AF1>>, gpioc::PC10<Alternate<AF1>>],
120-
rx => [gpiob::PB11<Alternate<AF4>>, gpioc::PC5<Alternate<AF1>>, gpioc::PC11<Alternate<AF1>>],
121-
}
122-
USART4 => {
123-
tx => [gpioa::PA0<Alternate<AF4>>, gpioc::PC10<Alternate<AF0>>],
124-
rx => [gpioa::PA1<Alternate<AF4>>, gpioc::PC11<Alternate<AF0>>],
125-
}
126-
}
127-
#[cfg(feature = "stm32f030xc")]
128-
usart_pins! {
129-
USART5 => {
130-
tx => [gpiob::PB3<Alternate<AF4>>, gpioc::PC12<Alternate<AF2>>],
131-
rx => [gpiob::PB4<Alternate<AF4>>, gpiod::PD2<Alternate<AF2>>],
132-
}
133-
USART6 => {
134-
tx => [gpioa::PA4<Alternate<AF5>>, gpioc::PC0<Alternate<AF2>>],
135-
rx => [gpioa::PA5<Alternate<AF5>>, gpioc::PC1<Alternate<AF2>>],
136-
}
137-
}
138-
13965
/// Serial abstraction
14066
#[allow(unused)]
14167
pub struct Serial<USART, TXPIN, RXPIN> {

‎src/spi.rs

Lines changed: 4 additions & 60 deletions
Original file line numberDiff line numberDiff line change
@@ -50,64 +50,6 @@ pub trait SckPin<SPI> {}
5050
pub trait MisoPin<SPI> {}
5151
pub trait MosiPin<SPI> {}
5252

53-
#[cfg(feature = "device-selected")]
54-
macro_rules! spi_pins {
55-
($($SPI:ident => {
56-
sck => [$($sck:ty),+ $(,)*],
57-
miso => [$($miso:ty),+ $(,)*],
58-
mosi => [$($mosi:ty),+ $(,)*],
59-
})+) => {
60-
$(
61-
$(
62-
impl SckPin<crate::stm32::$SPI> for $sck {}
63-
)+
64-
$(
65-
impl MisoPin<crate::stm32::$SPI> for $miso {}
66-
)+
67-
$(
68-
impl MosiPin<crate::stm32::$SPI> for $mosi {}
69-
)+
70-
)+
71-
}
72-
}
73-
74-
#[cfg(feature = "device-selected")]
75-
spi_pins! {
76-
SPI1 => {
77-
sck => [gpioa::PA5<Alternate<AF0>>, gpiob::PB3<Alternate<AF0>>],
78-
miso => [gpioa::PA6<Alternate<AF0>>, gpiob::PB4<Alternate<AF0>>],
79-
mosi => [gpioa::PA7<Alternate<AF0>>, gpiob::PB5<Alternate<AF0>>],
80-
}
81-
}
82-
#[cfg(feature = "stm32f030x6")]
83-
spi_pins! {
84-
SPI1 => {
85-
sck => [gpiob::PB13<Alternate<AF0>>],
86-
miso => [gpiob::PB14<Alternate<AF0>>],
87-
mosi => [gpiob::PB15<Alternate<AF0>>],
88-
}
89-
}
90-
#[cfg(any(
91-
feature = "stm32f030x8",
92-
feature = "stm32f030xc",
93-
feature = "stm32f070xb"
94-
))]
95-
spi_pins! {
96-
SPI2 => {
97-
sck => [gpiob::PB13<Alternate<AF0>>],
98-
miso => [gpiob::PB14<Alternate<AF0>>],
99-
mosi => [gpiob::PB15<Alternate<AF0>>],
100-
}
101-
}
102-
#[cfg(any(feature = "stm32f030xc", feature = "stm32f070xb"))]
103-
spi_pins! {
104-
SPI2 => {
105-
sck => [gpiob::PB10<Alternate<AF5>>],
106-
miso => [gpioc::PC2<Alternate<AF1>>],
107-
mosi => [gpioc::PC3<Alternate<AF1>>],
108-
}
109-
}
110-
11153
#[allow(unused)]
11254
macro_rules! spi {
11355
($($SPI:ident: ($spi:ident, $spiXen:ident, $spiXrst:ident, $apbenr:ident, $apbrstr:ident),)+) => {
@@ -281,11 +223,13 @@ impl<SPI, SCKPIN, MISOPIN, MOSIPIN> ::embedded_hal::blocking::spi::transfer::Def
281223
for Spi<SPI, SCKPIN, MISOPIN, MOSIPIN>
282224
where
283225
SPI: Deref<Target = SpiRegisterBlock>,
284-
{}
226+
{
227+
}
285228

286229
#[cfg(feature = "device-selected")]
287230
impl<SPI, SCKPIN, MISOPIN, MOSIPIN> ::embedded_hal::blocking::spi::write::Default<u8>
288231
for Spi<SPI, SCKPIN, MISOPIN, MOSIPIN>
289232
where
290233
SPI: Deref<Target = SpiRegisterBlock>,
291-
{}
234+
{
235+
}

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