Update docs & CHANGELOG

Author: datdenkikniet

CHANGELOG.md

@@ -1,6 +1,15 @@
 ## Unreleased
-* Add `RTIC` example
-* Use `ieee802_3_miim` for SMI access.
+* General
+    * Remove the `smi` feature and always enable miim/smi. Use `ieee802_3_miim` for SMI access
+    * Split MAC and DMA setup into their own separate modules
+* Examples:
+    * Switch to `defmt` as logger
+    * Use `probe-run` as runner
+    * Ensure that all examples build (and hopefully run) for all supported MCUs
+    * Add more extensive example run and build docs
+    * Remove arp-smoltcp example
+    * Add `rtic-echo` example
+    * Use a more simple `memory.x` that works for all supported MCUs
 
 ## [0.3.0](https://github.com/stm32-rs/stm32-eth/tree/v0.3.0)
 

src/mac/mod.rs

@@ -41,10 +41,10 @@ impl EthernetMAC {
     /// HCLK must be at least 25MHz, else this function will return `Err(WrongClock)`.
     ///
     /// This method does not initialise the external PHY. However, you can access SMI
-    /// `read` and `write` functions through the `smi` and `with_smi` functions.
+    /// `read` and `write` functions through the [`Self::mii`] and [`Self::with_miim`] functions.
     ///
-    /// Additionally, an optional `impl` of the [`ieee802_3_miim::Miim`] trait is available
-    /// with the `ieee802_3_miim` feature (enabled by default), for PHY communication.
+    /// Additionally, an `impl` of the [`ieee802_3_miim::Miim`] trait is available
+    /// for PHY communication.
     pub(crate) fn new(
         eth_mac: ETHERNET_MAC,
         eth_mmc: ETHERNET_MMC,
@@ -188,7 +188,7 @@ where
     /// To interact with a connected Phy, use the `read` and `write` functions.
     ///
     /// Functionality for interacting with PHYs from the `ieee802_3_miim` crate
-    /// is available if the default feature `ieee802_3_miim` is enabled.
+    /// is available.
     pub fn new(eth_mac: EthernetMAC, mdio: MDIO, mdc: MDC) -> Self {
         Self { eth_mac, mdio, mdc }
     }