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//! which pins can have a specific function, and provides
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//! functionality for setting up clocks and the MAC peripheral
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+ use crate :: {
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+ dma:: EthernetDMA ,
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+ stm32:: { ETHERNET_DMA , ETHERNET_MAC } ,
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+ } ;
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+
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#[ cfg( feature = "stm32f4xx-hal" ) ]
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- use stm32f4xx_hal:: {
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- bb,
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+ use crate :: hal:: bb;
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+
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+ #[ cfg( any(
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+ feature = "stm32f4xx-hal" ,
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+ feature = "stm32f7xx-hal" ,
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+ feature = "stm32h7xx-hal"
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+ ) ) ]
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+ use crate :: hal:: {
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gpio:: {
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gpioa:: { PA1 , PA7 } ,
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gpiob:: { PB11 , PB12 , PB13 } ,
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gpioc:: { PC4 , PC5 } ,
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- gpiog:: { PG11 , PG13 , PG14 } ,
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+ gpiog:: { PG11 , PG13 } ,
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Input ,
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Speed :: VeryHigh ,
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} ,
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pac:: { RCC , SYSCFG } ,
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} ;
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- #[ cfg( feature = "stm32f7xx-hal" ) ]
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+ #[ cfg( any( feature = "stm32f4xx-hal" , feature = "stm32f7xx-hal" ) ) ]
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+ use crate :: hal:: gpio:: gpiog:: PG14 ;
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+
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+ #[ cfg( any( feature = "stm32f7xx-hal" , feature = "stm32h7xx-hal" ) ) ]
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use cortex_m:: interrupt;
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- #[ cfg( feature = "stm32f7xx-hal" ) ]
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- use stm32f7xx_hal:: {
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- gpio:: {
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- gpioa:: { PA1 , PA7 } ,
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- gpiob:: { PB11 , PB12 , PB13 } ,
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- gpioc:: { PC4 , PC5 } ,
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- gpiog:: { PG11 , PG13 , PG14 } ,
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- Input ,
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- Speed :: VeryHigh ,
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- } ,
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- pac:: { RCC , SYSCFG } ,
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- } ;
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+ #[ cfg( feature = "f-series" ) ]
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+ use crate :: stm32:: ETHERNET_MMC ;
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- use crate :: {
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- dma:: EthernetDMA ,
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- stm32:: { ETHERNET_DMA , ETHERNET_MAC , ETHERNET_MMC } ,
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- } ;
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+ #[ cfg( feature = "stm32h7xx-hal" ) ]
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+ use crate :: stm32:: ETHERNET_MTL ;
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#[ cfg( feature = "ptp" ) ]
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- use crate :: { ptp:: EthernetPTP , stm32 :: ETHERNET_PTP } ;
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+ use crate :: ptp:: EthernetPTP ;
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// Enable syscfg and ethernet clocks. Reset the Ethernet MAC.
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pub ( crate ) fn setup ( ) {
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+ #[ cfg( feature = "stm32h7xx-hal" ) ]
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+ interrupt:: free ( |_| {
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+ // SAFETY: we only perform interrupt-free modifications of RCC.
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+ let rcc = unsafe { & * RCC :: ptr ( ) } ;
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+ let syscfg = unsafe { & * SYSCFG :: ptr ( ) } ;
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+
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+ rcc. apb4enr . modify ( |_, w| w. syscfgen ( ) . set_bit ( ) ) ;
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+ rcc. ahb1enr . modify ( |_, w| {
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+ w. eth1macen ( )
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+ . set_bit ( )
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+ . eth1rxen ( )
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+ . set_bit ( )
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+ . eth1txen ( )
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+ . set_bit ( )
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+ } ) ;
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+
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+ // Select RMII mode
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+ //
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+ // SAFETY: this is the correct value for RMII mode.
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+ syscfg. pmcr . modify ( |_, w| unsafe { w. epis ( ) . bits ( 0b100 ) } ) ;
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+
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+ // Reset pulse to MAC.
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+ rcc. ahb1rstr . modify ( |_, w| w. eth1macrst ( ) . set_bit ( ) ) ;
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+ rcc. ahb1rstr . modify ( |_, w| w. eth1macrst ( ) . clear_bit ( ) ) ;
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+ } ) ;
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+
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#[ cfg( feature = "stm32f4xx-hal" ) ]
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unsafe {
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const SYSCFG_BIT : u8 = 14 ;
@@ -178,44 +206,21 @@ pin_trait!(
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[ RmiiRxD1 , "RMII RX Data Pin 1" , "RXD1" ]
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) ;
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- /// Trait needed to setup the pins for the Ethernet peripheral.
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- pub trait AlternateVeryHighSpeed {
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- /// Puts the pin in the Alternate Function 11 with Very High Speed.
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- fn into_af11_very_high_speed ( self ) ;
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- }
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-
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/// A struct that contains all peripheral parts required to configure
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/// the ethernet peripheral.
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#[ allow( missing_docs) ]
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pub struct PartsIn {
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pub mac : ETHERNET_MAC ,
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- pub mmc : ETHERNET_MMC ,
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pub dma : ETHERNET_DMA ,
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- #[ cfg( feature = "ptp" ) ]
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- pub ptp : ETHERNET_PTP ,
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- }
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- #[ cfg( feature = "ptp" ) ]
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- impl From < ( ETHERNET_MAC , ETHERNET_MMC , ETHERNET_DMA , ETHERNET_PTP ) > for PartsIn {
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- fn from ( value : ( ETHERNET_MAC , ETHERNET_MMC , ETHERNET_DMA , ETHERNET_PTP ) ) -> Self {
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- Self {
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- mac : value. 0 ,
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- mmc : value. 1 ,
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- dma : value. 2 ,
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- ptp : value. 3 ,
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- }
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- }
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- }
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+ #[ cfg( feature = "f-series" ) ]
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+ pub mmc : ETHERNET_MMC ,
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- #[ cfg( not( feature = "ptp" ) ) ]
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- impl From < ( ETHERNET_MAC , ETHERNET_MMC , ETHERNET_DMA ) > for PartsIn {
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- fn from ( value : ( ETHERNET_MAC , ETHERNET_MMC , ETHERNET_DMA ) ) -> Self {
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- Self {
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- mac : value. 0 ,
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- mmc : value. 1 ,
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- dma : value. 2 ,
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- }
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- }
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+ #[ cfg( feature = "stm32h7xx-hal" ) ]
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+ pub mtl : ETHERNET_MTL ,
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+
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+ #[ cfg( all( feature = "ptp" , feature = "f-series" ) ) ]
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+ pub ptp : crate :: stm32:: ETHERNET_PTP ,
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}
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/// Access to all configured parts of the ethernet peripheral.
@@ -229,20 +234,10 @@ pub struct Parts<'rx, 'tx, T> {
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pub ptp : EthernetPTP ,
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}
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- #[ cfg( feature = "ptp" ) ]
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- impl < ' rx , ' tx , T > Parts < ' rx , ' tx , T > {
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- /// Split this [`Parts`] into its components.
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- pub fn split ( self ) -> ( T , EthernetDMA < ' rx , ' tx > , EthernetPTP ) {
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- ( self . mac , self . dma , self . ptp )
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- }
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- }
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-
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- #[ cfg( not( feature = "ptp" ) ) ]
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- impl < ' rx , ' tx , T > Parts < ' rx , ' tx , T > {
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- /// Split this [`Parts`] into its components.
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- pub fn split ( self ) -> ( T , EthernetDMA < ' rx , ' tx > ) {
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- ( self . mac , self . dma )
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- }
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+ /// Trait needed to setup the pins for the Ethernet peripheral.
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+ pub trait AlternateVeryHighSpeed {
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+ /// Puts the pin in the Alternate Function 11 with Very High Speed.
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+ fn into_af11_very_high_speed ( self ) ;
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}
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/// A struct that represents a combination of pins to be used
@@ -305,6 +300,33 @@ macro_rules! impl_pins {
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} ;
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}
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+ #[ cfg( feature = "stm32h7xx-hal" ) ]
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+ impl_pins ! (
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+ RmiiRefClk : [
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+ PA1 <Input >,
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+ ] ,
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+ RmiiCrsDv : [
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+ PA7 <Input >,
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+ ] ,
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+ RmiiTxEN : [
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+ PB11 <Input >,
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+ PG11 <Input >,
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+ ] ,
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+ RmiiTxD0 : [
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+ PB12 <Input >,
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+ PG13 <Input >,
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+ ] ,
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+ RmiiTxD1 : [
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+ PB13 <Input >,
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+ ] ,
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+ RmiiRxD0 : [
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+ PC4 <Input >,
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+ ] ,
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+ RmiiRxD1 : [
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+ PC5 <Input >,
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+ ] ,
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+ ) ;
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+
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#[ cfg( any( feature = "stm32f4xx-hal" , feature = "stm32f7xx-hal" ) ) ]
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impl_pins ! (
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RmiiRefClk : [
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