Skip to content

Commit 8f47ed5

Browse files
author
Johannes Draaijer
committed
Ensure high speed setup for stm32f107
1 parent 0ae0265 commit 8f47ed5

File tree

2 files changed

+12
-4
lines changed

2 files changed

+12
-4
lines changed

src/lib.rs

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -99,8 +99,6 @@ pub struct EthernetMAC {
9999
/// accessible by the peripheral. Core-Coupled Memory (CCM) is
100100
/// usually not accessible.
101101
/// - HCLK must be at least 25 MHz.
102-
/// - The pin speed for `stm32f107` is currenctly implicitly set to the required 50 MHz speed by the HAL.
103-
/// However, we can not guarantee this expicitly so double-check before using.
104102
pub fn new<'rx, 'tx, REFCLK, CRS, TXEN, TXD0, TXD1, RXD0, RXD1>(
105103
eth_mac: ETHERNET_MAC,
106104
eth_mmc: ETHERNET_MMC,

src/setup.rs

Lines changed: 12 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -259,7 +259,9 @@ impl_pins!(
259259
#[cfg(feature = "stm32f1xx-hal")]
260260
mod stm32f1 {
261261
use super::*;
262-
use stm32f1xx_hal::gpio::{gpioa, gpiob, gpioc, gpiod, Alternate, Floating, Input, PushPull};
262+
use stm32f1xx_hal::gpio::{
263+
gpioa, gpiob, gpioc, gpiod, Alternate, Floating, IOPinSpeed, Input, OutputSpeed, PushPull,
264+
};
263265

264266
// STM32F1xx's require access to the CRL/CRH registers to change pin mode. As a result, we
265267
// require that pins are already in the necessary mode before constructing `EthPins` as it
@@ -293,7 +295,15 @@ mod stm32f1 {
293295
($($PIN:ident),*) => {
294296
$(
295297
impl AlternateVeryHighSpeed for $PIN {
296-
fn into_af11_very_high_speed(self) {}
298+
fn into_af11_very_high_speed(self) {
299+
// SAFETY: this assumes that no other access to the GPIO
300+
// control registers is being performed at the same time.
301+
//
302+
// With the current API, this is the best we can do.
303+
let acrl: &mut _ = &mut unsafe { core::mem::transmute(()) };
304+
let mut pin = self.into_alternate_push_pull(acrl);
305+
pin.set_speed(acrl, IOPinSpeed::Mhz50);
306+
}
297307
}
298308
)*
299309
}

0 commit comments

Comments
 (0)