Merge pull request #66 from stm32-rs/newer-ptp-support

Newer ptp support

Author: datdenkikniet

.github/workflows/build.yml

@@ -31,7 +31,7 @@ jobs:
         toolchain:
           - stable
         features:
-          - stm32f745
+          - stm32f745,ptp
     runs-on: ubuntu-20.04
     steps:
       - name: Checkout
@@ -90,6 +90,33 @@ jobs:
         run: |
           cargo build --release --target=${{ matrix.target }} --features ${{ matrix.features }}
 
+  build-ptp:
+    name: build-no-ptp
+    runs-on: ubuntu-20.04
+    strategy:
+      matrix:
+        target:
+          - x86_64-unknown-linux-gnu
+        toolchain:
+          - stable
+        features:
+          - stm32f107
+          - stm32f407
+          - stm32f745
+    steps:
+      - name: Checkout
+        uses: actions/checkout@v3
+
+      - name: Install Rust ${{ matrix.toolchain }} with target (${{ matrix.target }})
+        run: |
+          rustup set profile minimal
+          rustup override set ${{ matrix.toolchain }}
+          rustup target add ${{ matrix.target }}
+
+      - name: cargo build
+        run: |
+          cargo build --release --target=${{ matrix.target }} --features ${{ matrix.features }} --no-default-features
+
   # Examples
   examples:
     name: examples

CHANGELOG.md

@@ -2,9 +2,11 @@
 * General
     * Remove the `smi` feature and always enable miim/smi. Use `ieee802_3_miim` for SMI access
     * Split MAC and DMA setup into their own separate modules
+    * Move all DMA related files into modules under `dma`
     * Update stm32f1xx-hal and stm32f4xx-hal to their latests version as of 15-12-2022.
     * Allow for configuration of MAC speed. ([#53](https://github.com/stm32-rs/stm32-eth/pull/53), fixes [#24](https://github.com/stm32-rs/stm32-eth/pull/24))
     * Fix [#57](https://github.com/stm32-rs/stm32-eth/issues/57). ([#58](https://github.com/stm32-rs/stm32-eth/pull/58))
+    * Add support for the PTP peripheral
 * CI
     * Test compilability of examples more extensively
     * Move away from actions-rs
@@ -16,6 +18,7 @@
     * Remove arp-smoltcp example
     * Add `rtic-echo` example
     * Use a more simple `memory.x` that works for all supported MCUs
+    * Add `rtic-timestamp` example
 
 ## [0.3.0](https://github.com/stm32-rs/stm32-eth/tree/v0.3.0)
 

Cargo.toml

@@ -25,20 +25,21 @@ stm32f7xx-hal = { version = "0.7.0", optional = true }
 stm32f4xx-hal = { version = "0.14", optional = true }
 stm32f4 = { version = "0.15", optional = true }
 stm32f1xx-hal = { version = "0.10", optional = true }
-ieee802_3_miim = "0.7"
+ieee802_3_miim = "0.8"
 cortex-m = "0.7"
 log = { version = "0.4", optional = true }
 defmt = { version = "0.3", optional = true }
 
 [dependencies.smoltcp]
-version = "0.8"
+version = "0.8.2"
 default-features = false
 optional = true
 
 [features]
-default = [ "defmt" ]
+default = [ "defmt", "ptp" ]
 device-selected = []
 fence = []
+ptp = [ ]
 
 stm32f107 = ["stm32f1xx-hal/stm32f107", "device-selected"]
 
@@ -89,6 +90,10 @@ required-features = [ "defmt" ]
 name = "rtic-echo"
 required-features = [ "defmt" , "smoltcp-phy" ]
 
+[[example]]
+name = "rtic-timestamp"
+required-features = [ "defmt", "ptp" ]
+
 [profile.release]
 debug = 2
 lto = true

README.md

@@ -29,7 +29,7 @@ use stm32_eth::{
     hal::gpio::GpioExt,
     hal::rcc::RccExt,
     stm32::Peripherals,
-    RingEntry,
+    dma::{RxRingEntry, TxRingEntry},
     EthPins,
 };
 use fugit::RateExtU32;
@@ -56,12 +56,18 @@ fn main() {
         rx_d1: gpioc.pc5,
     };
 
-    let mut rx_ring: [RingEntry<_>; 16] = Default::default();
-    let mut tx_ring: [RingEntry<_>; 8] = Default::default();
-    let (mut eth_dma, _eth_mac) = stm32_eth::new(
-        p.ETHERNET_MAC,
-        p.ETHERNET_MMC,
-        p.ETHERNET_DMA,
+    let mut rx_ring: [RxRingEntry; 16] = Default::default();
+    let mut tx_ring: [TxRingEntry; 8] = Default::default();
+
+    let parts = stm32_eth::PartsIn {
+        mac: p.ETHERNET_MAC,
+        mmc: p.ETHERNET_MMC,
+        dma: p.ETHERNET_DMA,
+        ptp: p.ETHERNET_PTP,
+    };
+
+    let stm32_eth::Parts { dma: mut eth_dma, mac: _, ptp: _ } = stm32_eth::new(
+        parts,
         &mut rx_ring[..],
         &mut tx_ring[..],
         clocks,
@@ -70,12 +76,12 @@ fn main() {
     .unwrap();
     eth_dma.enable_interrupt();
 
-    if let Ok(pkt) = eth_dma.recv_next() {
+    if let Ok(pkt) = eth_dma.recv_next(None) {
         // handle received pkt
     }
 
     let size = 42;
-    eth_dma.send(size, |buf| {
+    eth_dma.send(size, None, |buf| {
         // write up to `size` bytes into buf before it is being sent
     }).expect("send");
 }

examples/arp.rs

@@ -18,11 +18,12 @@ use cortex_m::interrupt::Mutex;
 use stm32_eth::{
     mac::{phy::BarePhy, Phy},
     stm32::{interrupt, CorePeripherals, Peripherals, SYST},
+    Parts,
 };
 
 pub mod common;
 
-use stm32_eth::{RingEntry, TxError};
+use stm32_eth::dma::{RxRingEntry, TxError, TxRingEntry};
 
 const PHY_ADDR: u8 = 0;
 
@@ -42,24 +43,27 @@ fn main() -> ! {
 
     let (eth_pins, mdio, mdc) = common::setup_pins(gpio);
 
-    let mut rx_ring: [RingEntry<_>; 2] = Default::default();
-    let mut tx_ring: [RingEntry<_>; 2] = Default::default();
+    let mut rx_ring: [RxRingEntry; 2] = Default::default();
+    let mut tx_ring: [TxRingEntry; 2] = Default::default();
 
-    let (mut eth_dma, eth_mac) = stm32_eth::new(
-        ethernet.mac,
-        ethernet.mmc,
-        ethernet.dma,
+    let Parts {
+        mut dma,
+        mac,
+        #[cfg(feature = "ptp")]
+            ptp: _,
+    } = stm32_eth::new(
+        ethernet,
         &mut rx_ring[..],
         &mut tx_ring[..],
         clocks,
         eth_pins,
     )
     .unwrap();
-    eth_dma.enable_interrupt();
+    dma.enable_interrupt();
 
     let mut last_link_up = false;
 
-    let mut bare_phy = BarePhy::new(eth_mac.with_mii(mdio, mdc), PHY_ADDR, Default::default());
+    let mut bare_phy = BarePhy::new(mac.with_mii(mdio, mdc), PHY_ADDR, Default::default());
 
     loop {
         let link_up = bare_phy.phy_link_up();
@@ -88,7 +92,7 @@ fn main() -> ! {
             const TARGET_MAC: [u8; 6] = [0x00, 0x00, 0x00, 0x00, 0x00, 0x00];
             const TARGET_IP: [u8; 4] = [0x0A, 0x00, 0x00, 0x02]; // 10.0.0.2
 
-            let r = eth_dma.send(SIZE, |buf| {
+            let r = dma.send(SIZE, None, |buf| {
                 buf[0..6].copy_from_slice(&DST_MAC);
                 buf[6..12].copy_from_slice(&SRC_MAC);
                 buf[12..14].copy_from_slice(&ETH_TYPE);

examples/common.rs

@@ -6,30 +6,26 @@
 
 use stm32_eth::{
     hal::{gpio::GpioExt, rcc::Clocks},
-    stm32::{ETHERNET_DMA, ETHERNET_MAC, ETHERNET_MMC},
+    PartsIn,
 };
 
 pub use pins::{setup_pins, Gpio};
 
 use fugit::RateExtU32;
 use stm32_eth::hal::rcc::RccExt;
 
-pub struct EthernetPeripherals {
-    pub dma: ETHERNET_DMA,
-    pub mac: ETHERNET_MAC,
-    pub mmc: ETHERNET_MMC,
-}
-
 /// Setup the clocks and return clocks and a GPIO struct that
 /// can be used to set up all of the pins.
 ///
 /// This configures HCLK to be at least 25 MHz, which is the minimum required
 /// for ethernet operation to be valid.
-pub fn setup_peripherals(p: stm32_eth::stm32::Peripherals) -> (Clocks, Gpio, EthernetPeripherals) {
-    let ethernet = EthernetPeripherals {
+pub fn setup_peripherals(p: stm32_eth::stm32::Peripherals) -> (Clocks, Gpio, PartsIn) {
+    let ethernet = PartsIn {
         dma: p.ETHERNET_DMA,
         mac: p.ETHERNET_MAC,
         mmc: p.ETHERNET_MMC,
+        #[cfg(feature = "ptp")]
+        ptp: p.ETHERNET_PTP,
     };
 
     #[cfg(any(feature = "stm32f7xx-hal", feature = "stm32f4xx-hal"))]
@@ -316,15 +312,19 @@ impl<M: Miim> EthernetPhy<M> {
     ///
     /// Returns an error if the PHY does not support the extended register
     /// set, or if the PHY's identifier does not correspond to a known PHY.
-    pub fn from_miim(miim: M, phy_addr: u8) -> Result<Self, ()> {
+    pub fn from_miim(miim: M, phy_addr: u8) -> Result<Self, M> {
         let mut bare = BarePhy::new(miim, phy_addr, Pause::NoPause);
-        let phy_ident = bare.phy_ident().ok_or(())?;
+        let phy_ident = if let Some(id) = bare.phy_ident() {
+            id.raw_u32()
+        } else {
+            return Err(bare.release());
+        };
         let miim = bare.release();
         match phy_ident & 0xFFFFFFF0 {
             0x0007C0F0 => Ok(Self::LAN8720A(LAN8720A::new(miim, phy_addr))),
             0x0007C130 => Ok(Self::LAN8742A(LAN8742A::new(miim, phy_addr))),
             0x00221560 => Ok(Self::KSZ8081R(KSZ8081R::new(miim, phy_addr))),
-            _ => Err(()),
+            _ => Err(miim),
         }
     }
 
@@ -356,4 +356,13 @@ impl<M: Miim> EthernetPhy<M> {
             EthernetPhy::KSZ8081R(phy) => phy.link_speed(),
         }
     }
+
+    #[allow(dead_code)]
+    pub fn release(self) -> M {
+        match self {
+            EthernetPhy::LAN8720A(phy) => phy.release(),
+            EthernetPhy::LAN8742A(phy) => phy.release(),
+            EthernetPhy::KSZ8081R(phy) => phy.release(),
+        }
+    }
 }

examples/ip.rs

@@ -22,7 +22,10 @@ use smoltcp::wire::{EthernetAddress, IpAddress, IpCidr, Ipv4Address};
 
 pub mod common;
 
-use stm32_eth::RingEntry;
+use stm32_eth::{
+    dma::{RxRingEntry, TxRingEntry},
+    Parts,
+};
 
 const SRC_MAC: [u8; 6] = [0x00, 0x00, 0xDE, 0xAD, 0xBE, 0xEF];
 
@@ -42,19 +45,22 @@ fn main() -> ! {
 
     let (eth_pins, _mdio, _mdc) = common::setup_pins(gpio);
 
-    let mut rx_ring: [RingEntry<_>; 2] = Default::default();
-    let mut tx_ring: [RingEntry<_>; 2] = Default::default();
-    let (mut eth_dma, _eth_mac) = stm32_eth::new(
-        ethernet.mac,
-        ethernet.mmc,
-        ethernet.dma,
+    let mut rx_ring: [RxRingEntry; 2] = Default::default();
+    let mut tx_ring: [TxRingEntry; 2] = Default::default();
+    let Parts {
+        mut dma,
+        mac: _,
+        #[cfg(feature = "ptp")]
+            ptp: _,
+    } = stm32_eth::new(
+        ethernet,
         &mut rx_ring[..],
         &mut tx_ring[..],
         clocks,
         eth_pins,
     )
     .unwrap();
-    eth_dma.enable_interrupt();
+    dma.enable_interrupt();
 
     let local_addr = Ipv4Address::new(10, 0, 0, 1);
     let ip_addr = IpCidr::new(IpAddress::from(local_addr), 24);
@@ -64,7 +70,7 @@ fn main() -> ! {
     let ethernet_addr = EthernetAddress(SRC_MAC);
 
     let mut sockets: [_; 1] = Default::default();
-    let mut iface = InterfaceBuilder::new(&mut eth_dma, &mut sockets[..])
+    let mut iface = InterfaceBuilder::new(&mut dma, &mut sockets[..])
         .hardware_addr(ethernet_addr.into())
         .ip_addrs(&mut ip_addrs[..])
         .neighbor_cache(neighbor_cache)