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1 parent 7c82b6c commit e396fefCopy full SHA for e396fef
src/registers/model_specific.rs
@@ -727,7 +727,7 @@ mod x86_64 {
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/// All affected pages must be flushed from the TLB. Processor caches may also need to be
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/// flushed. Additionally, all pages that map to a given frame must have the same memory
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/// type.
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- ///
+ ///
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/// The PAT must be supported on the CPU, otherwise a general protection exception will
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/// occur. Support can be detected using the `cpuid` instruction.
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#[inline]
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