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Add tests for vreinterpret
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  • crates/core_arch/src/arm/neon

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+39
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crates/core_arch/src/arm/neon/mod.rs

Lines changed: 39 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1332,7 +1332,7 @@ pub unsafe fn vreinterpretq_u64_u8(a: uint8x16_t) -> uint64x2_t {
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// This doesn't actually has an assembly instruction but simdarch-verify
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//requires it to have one ... it's a function so it returns.
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#[cfg_attr(test, assert_instr(ret))]
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pub unsafe fn vreinterpretq_u8_s8(a: uint8x16_t) -> uint8x16_t {
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pub unsafe fn vreinterpretq_u8_s8(a: int8x16_t) -> uint8x16_t {
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transmute(a)
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}
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@@ -2308,6 +2308,44 @@ mod tests {
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let r: f32x2 = transmute(vpmax_f32(transmute(a), transmute(b)));
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assert_eq!(r, e);
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}
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#[simd_test(enable = "neon")]
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unsafe fn test_vreinterpretq_s8_u8() {
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let a = i8x16::new(-1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
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let r: u8x16 = transmute(vreinterpretq_s8_u8(transmute(a)));
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let e = u8x16::new(0xFF, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
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assert_eq!(r, e)
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}
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#[simd_test(enable = "neon")]
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unsafe fn test_vreinterpretq_u16_u8() {
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let a = u16x8::new(
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0x01_00, 0x03_02, 0x05_04, 0x07_06, 0x09_08, 0x0B_0A, 0x0D_0C, 0x0F_0E,
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);
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let r: u8x16 = transmute(vreinterpretq_u16_u8(transmute(a)));
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let e = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
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assert_eq!(r, e)
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}
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#[simd_test(enable = "neon")]
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unsafe fn test_vreinterpretq_u32_u8() {
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let a = u32x4::new(0x03_02_01_00, 0x07_06_05_04, 0x0B_0A_09_08, 0x0F_0E_0D_0C);
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let r: u8x16 = transmute(vreinterpretq_u32_u8(transmute(a)));
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let e = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
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assert_eq!(r, e)
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}
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#[simd_test(enable = "neon")]
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unsafe fn test_vreinterpretq_u64_u8() {
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let a: u64x2 = u64x2::new(0x07_06_05_04_03_02_01_00, 0x0F_0E_0D_0C_0B_0A_09_08);
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let r: u8x16 = transmute(vreinterpretq_u64_u8(transmute(a)));
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let e = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
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assert_eq!(r, e)
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}
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#[simd_test(enable = "neon")]
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unsafe fn test_vreinterpretq_u8_s8() {
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let a = u8x16::new(0xFF, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
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let r: i8x16 = transmute(vreinterpretq_u8_s8(transmute(a)));
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let e = i8x16::new(-1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16);
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assert_eq!(r, e)
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}
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}
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#[cfg(test)]

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