@@ -1332,7 +1332,7 @@ pub unsafe fn vreinterpretq_u64_u8(a: uint8x16_t) -> uint64x2_t {
1332
1332
// This doesn't actually has an assembly instruction but simdarch-verify
1333
1333
//requires it to have one ... it's a function so it returns.
1334
1334
#[ cfg_attr( test, assert_instr( ret) ) ]
1335
- pub unsafe fn vreinterpretq_u8_s8 ( a : uint8x16_t ) -> uint8x16_t {
1335
+ pub unsafe fn vreinterpretq_u8_s8 ( a : int8x16_t ) -> uint8x16_t {
1336
1336
transmute ( a)
1337
1337
}
1338
1338
@@ -2308,6 +2308,44 @@ mod tests {
2308
2308
let r: f32x2 = transmute ( vpmax_f32 ( transmute ( a) , transmute ( b) ) ) ;
2309
2309
assert_eq ! ( r, e) ;
2310
2310
}
2311
+
2312
+ #[ simd_test( enable = "neon" ) ]
2313
+ unsafe fn test_vreinterpretq_s8_u8 ( ) {
2314
+ let a = i8x16:: new ( -1 , 2 , 3 , 4 , 5 , 6 , 7 , 8 , 9 , 10 , 11 , 12 , 13 , 14 , 15 , 16 ) ;
2315
+ let r: u8x16 = transmute ( vreinterpretq_s8_u8 ( transmute ( a) ) ) ;
2316
+ let e = u8x16:: new ( 0xFF , 2 , 3 , 4 , 5 , 6 , 7 , 8 , 9 , 10 , 11 , 12 , 13 , 14 , 15 , 16 ) ;
2317
+ assert_eq ! ( r, e)
2318
+ }
2319
+ #[ simd_test( enable = "neon" ) ]
2320
+ unsafe fn test_vreinterpretq_u16_u8 ( ) {
2321
+ let a = u16x8:: new (
2322
+ 0x01_00 , 0x03_02 , 0x05_04 , 0x07_06 , 0x09_08 , 0x0B_0A , 0x0D_0C , 0x0F_0E ,
2323
+ ) ;
2324
+ let r: u8x16 = transmute ( vreinterpretq_u16_u8 ( transmute ( a) ) ) ;
2325
+ let e = u8x16:: new ( 0 , 1 , 2 , 3 , 4 , 5 , 6 , 7 , 8 , 9 , 10 , 11 , 12 , 13 , 14 , 15 ) ;
2326
+ assert_eq ! ( r, e)
2327
+ }
2328
+ #[ simd_test( enable = "neon" ) ]
2329
+ unsafe fn test_vreinterpretq_u32_u8 ( ) {
2330
+ let a = u32x4:: new ( 0x03_02_01_00 , 0x07_06_05_04 , 0x0B_0A_09_08 , 0x0F_0E_0D_0C ) ;
2331
+ let r: u8x16 = transmute ( vreinterpretq_u32_u8 ( transmute ( a) ) ) ;
2332
+ let e = u8x16:: new ( 0 , 1 , 2 , 3 , 4 , 5 , 6 , 7 , 8 , 9 , 10 , 11 , 12 , 13 , 14 , 15 ) ;
2333
+ assert_eq ! ( r, e)
2334
+ }
2335
+ #[ simd_test( enable = "neon" ) ]
2336
+ unsafe fn test_vreinterpretq_u64_u8 ( ) {
2337
+ let a: u64x2 = u64x2:: new ( 0x07_06_05_04_03_02_01_00 , 0x0F_0E_0D_0C_0B_0A_09_08 ) ;
2338
+ let r: u8x16 = transmute ( vreinterpretq_u64_u8 ( transmute ( a) ) ) ;
2339
+ let e = u8x16:: new ( 0 , 1 , 2 , 3 , 4 , 5 , 6 , 7 , 8 , 9 , 10 , 11 , 12 , 13 , 14 , 15 ) ;
2340
+ assert_eq ! ( r, e)
2341
+ }
2342
+ #[ simd_test( enable = "neon" ) ]
2343
+ unsafe fn test_vreinterpretq_u8_s8 ( ) {
2344
+ let a = u8x16:: new ( 0xFF , 2 , 3 , 4 , 5 , 6 , 7 , 8 , 9 , 10 , 11 , 12 , 13 , 14 , 15 , 16 ) ;
2345
+ let r: i8x16 = transmute ( vreinterpretq_u8_s8 ( transmute ( a) ) ) ;
2346
+ let e = i8x16:: new ( -1 , 2 , 3 , 4 , 5 , 6 , 7 , 8 , 9 , 10 , 11 , 12 , 13 , 14 , 15 , 16 ) ;
2347
+ assert_eq ! ( r, e)
2348
+ }
2311
2349
}
2312
2350
2313
2351
#[ cfg( test) ]
0 commit comments