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surechenAmanieu
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use stdarch-gen to generate instructions
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6 files changed

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-140
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6 files changed

+180
-140
lines changed

crates/core_arch/src/aarch64/neon/generated.rs

Lines changed: 32 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -271,6 +271,22 @@ pub unsafe fn vceqzq_f64(a: float64x2_t) -> uint64x2_t {
271271
simd_eq(a, transmute(b))
272272
}
273273

274+
/// Floating-point absolute value
275+
#[inline]
276+
#[target_feature(enable = "neon")]
277+
#[cfg_attr(test, assert_instr(fabs))]
278+
pub unsafe fn vabs_f64(a: float64x1_t) -> float64x1_t {
279+
simd_fabs(a)
280+
}
281+
282+
/// Floating-point absolute value
283+
#[inline]
284+
#[target_feature(enable = "neon")]
285+
#[cfg_attr(test, assert_instr(fabs))]
286+
pub unsafe fn vabsq_f64(a: float64x2_t) -> float64x2_t {
287+
simd_fabs(a)
288+
}
289+
274290
/// Compare signed greater than
275291
#[inline]
276292
#[target_feature(enable = "neon")]
@@ -838,6 +854,22 @@ mod test {
838854
assert_eq!(r, e);
839855
}
840856

857+
#[simd_test(enable = "neon")]
858+
unsafe fn test_vabs_f64() {
859+
let a: f64 = -0.1;
860+
let e: f64 = 0.1;
861+
let r: f64 = transmute(vabs_f64(transmute(a)));
862+
assert_eq!(r, e);
863+
}
864+
865+
#[simd_test(enable = "neon")]
866+
unsafe fn test_vabsq_f64() {
867+
let a: f64x2 = f64x2::new(-0.1, -2.2);
868+
let e: f64x2 = f64x2::new(0.1, 2.2);
869+
let r: f64x2 = transmute(vabsq_f64(transmute(a)));
870+
assert_eq!(r, e);
871+
}
872+
841873
#[simd_test(enable = "neon")]
842874
unsafe fn test_vcgt_s64() {
843875
let a: i64x1 = i64x1::new(1);

crates/core_arch/src/aarch64/neon/mod.rs

Lines changed: 0 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -72,10 +72,6 @@ extern "C" {
7272
fn vabs_s64_(a: int64x1_t) -> int64x1_t;
7373
#[link_name = "llvm.aarch64.neon.abs.v2i64"]
7474
fn vabsq_s64_(a: int64x2_t) -> int64x2_t;
75-
#[link_name = "llvm.fabs.v1f64"]
76-
fn vabs_f64_(a: float64x1_t) -> float64x1_t;
77-
#[link_name = "llvm.fabs.v2f64"]
78-
fn vabsq_f64_(a: float64x2_t) -> float64x2_t;
7975

8076
#[link_name = "llvm.aarch64.neon.suqadd.v8i8"]
8177
fn vuqadd_s8_(a: int8x8_t, b: uint8x8_t) -> int8x8_t;
@@ -708,21 +704,6 @@ pub unsafe fn vabsq_s64(a: int64x2_t) -> int64x2_t {
708704
vabsq_s64_(a)
709705
}
710706

711-
/// Floating-point absolute value.
712-
#[inline]
713-
#[target_feature(enable = "neon")]
714-
#[cfg_attr(test, assert_instr(fabs))]
715-
pub unsafe fn vabs_f64(a: float64x1_t) -> float64x1_t {
716-
vabs_f64_(a)
717-
}
718-
/// Floating-point absolute value.
719-
#[inline]
720-
#[target_feature(enable = "neon")]
721-
#[cfg_attr(test, assert_instr(fabs))]
722-
pub unsafe fn vabsq_f64(a: float64x2_t) -> float64x2_t {
723-
vabsq_f64_(a)
724-
}
725-
726707
/// Signed saturating Accumulate of Unsigned value.
727708
#[inline]
728709
#[target_feature(enable = "neon")]
@@ -3932,20 +3913,6 @@ mod tests {
39323913
let e = i64x2::new(i64::MIN, i64::MAX);
39333914
assert_eq!(r, e);
39343915
}
3935-
#[simd_test(enable = "neon")]
3936-
unsafe fn test_vabs_f64() {
3937-
let a = f64x1::new(f64::MIN);
3938-
let r: f64x1 = transmute(vabs_f64(transmute(a)));
3939-
let e = f64x1::new(f64::MAX);
3940-
assert_eq!(r, e);
3941-
}
3942-
#[simd_test(enable = "neon")]
3943-
unsafe fn test_vabsq_f64() {
3944-
let a = f64x2::new(f64::MIN, -4.2);
3945-
let r: f64x2 = transmute(vabsq_f64(transmute(a)));
3946-
let e = f64x2::new(f64::MAX, 4.2);
3947-
assert_eq!(r, e);
3948-
}
39493916

39503917
#[simd_test(enable = "neon")]
39513918
unsafe fn test_vaddv_s16() {

crates/core_arch/src/arm/neon/generated.rs

Lines changed: 36 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -629,6 +629,26 @@ pub unsafe fn vceqq_f32(a: float32x4_t, b: float32x4_t) -> uint32x4_t {
629629
simd_eq(a, b)
630630
}
631631

632+
/// Floating-point absolute value
633+
#[inline]
634+
#[target_feature(enable = "neon")]
635+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
636+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vabs))]
637+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(fabs))]
638+
pub unsafe fn vabs_f32(a: float32x2_t) -> float32x2_t {
639+
simd_fabs(a)
640+
}
641+
642+
/// Floating-point absolute value
643+
#[inline]
644+
#[target_feature(enable = "neon")]
645+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
646+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vabs))]
647+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(fabs))]
648+
pub unsafe fn vabsq_f32(a: float32x4_t) -> float32x4_t {
649+
simd_fabs(a)
650+
}
651+
632652
/// Compare signed greater than
633653
#[inline]
634654
#[target_feature(enable = "neon")]
@@ -3651,6 +3671,22 @@ mod test {
36513671
assert_eq!(r, e);
36523672
}
36533673

3674+
#[simd_test(enable = "neon")]
3675+
unsafe fn test_vabs_f32() {
3676+
let a: f32x2 = f32x2::new(-0.1, -2.2);
3677+
let e: f32x2 = f32x2::new(0.1, 2.2);
3678+
let r: f32x2 = transmute(vabs_f32(transmute(a)));
3679+
assert_eq!(r, e);
3680+
}
3681+
3682+
#[simd_test(enable = "neon")]
3683+
unsafe fn test_vabsq_f32() {
3684+
let a: f32x4 = f32x4::new(-0.1, -2.2, -3.3, -6.6);
3685+
let e: f32x4 = f32x4::new(0.1, 2.2, 3.3, 6.6);
3686+
let r: f32x4 = transmute(vabsq_f32(transmute(a)));
3687+
assert_eq!(r, e);
3688+
}
3689+
36543690
#[simd_test(enable = "neon")]
36553691
unsafe fn test_vcgt_s8() {
36563692
let a: i8x8 = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8);

crates/core_arch/src/arm/neon/mod.rs

Lines changed: 1 addition & 35 deletions
Original file line numberDiff line numberDiff line change
@@ -125,9 +125,6 @@ extern "C" {
125125
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vabs.v2i32")]
126126
#[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.abs.v2i32")]
127127
fn vabs_s32_(a: int32x2_t) -> int32x2_t;
128-
#[cfg_attr(target_arch = "arm", link_name = "llvm.fabs.v2f32")]
129-
#[cfg_attr(target_arch = "aarch64", link_name = "llvm.fabs.v2f32")]
130-
fn vabs_f32_(a: float32x2_t) -> float32x2_t;
131128
// absolute value (128-bit)
132129
#[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vabs.v16i8")]
133130
#[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.abs.v16i8")]
@@ -1153,24 +1150,6 @@ pub unsafe fn vabsq_s16(a: int16x8_t) -> int16x8_t {
11531150
pub unsafe fn vabsq_s32(a: int32x4_t) -> int32x4_t {
11541151
vabsq_s32_(a)
11551152
}
1156-
/// Floating-point absolute value.
1157-
#[inline]
1158-
#[target_feature(enable = "neon")]
1159-
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1160-
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vabs))]
1161-
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(fabs))]
1162-
pub unsafe fn vabs_f32(a: float32x2_t) -> float32x2_t {
1163-
vabs_f32_(a)
1164-
}
1165-
/// Floating-point absolute value.
1166-
#[inline]
1167-
#[target_feature(enable = "neon")]
1168-
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1169-
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vabs))]
1170-
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(fabs))]
1171-
pub unsafe fn vabsq_f32(a: float32x4_t) -> float32x4_t {
1172-
vabsq_f32_(a)
1173-
}
11741153

11751154
/// Add pairwise.
11761155
#[inline]
@@ -8588,20 +8567,7 @@ mod tests {
85888567
let e = i32x4::new(i32::MIN, i32::MAX, 0, 1);
85898568
assert_eq!(r, e);
85908569
}
8591-
#[simd_test(enable = "neon")]
8592-
unsafe fn test_vabs_f32() {
8593-
let a = f32x2::new(f32::MIN, -1.0);
8594-
let r: f32x2 = transmute(vabs_f32(transmute(a)));
8595-
let e = f32x2::new(f32::MAX, 1.0);
8596-
assert_eq!(r, e);
8597-
}
8598-
#[simd_test(enable = "neon")]
8599-
unsafe fn test_vabsq_f32() {
8600-
let a = f32x4::new(f32::MIN, -1.32, -4.3, -6.8);
8601-
let r: f32x4 = transmute(vabsq_f32(transmute(a)));
8602-
let e = f32x4::new(f32::MAX, 1.32, 4.3, 6.8);
8603-
assert_eq!(r, e);
8604-
}
8570+
86058571
#[simd_test(enable = "neon")]
86068572
unsafe fn test_vpadd_s16() {
86078573
let a = i16x4::new(1, 2, 3, 4);

crates/stdarch-gen/neon.spec

Lines changed: 25 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -53,12 +53,12 @@
5353
// FALSE - 'false' all bits are set to 0
5454
// FF - same as 'true'
5555
// MIN - minimal value (either 0 or the lowest negative number)
56-
// MAX - maximal value propr to overflow
56+
// MAX - maximal value proper to overflow
5757
//
5858
// # validate <values>
5959
// Validates a and b aginst the expected result of the test.
6060
// The special values 'TRUE' and 'FALSE' can be used to
61-
// represent the corect NEON representation of true or
61+
// represent the correct NEON representation of true or
6262
// false values. It too gets scaled to the type.
6363
//
6464
// Validate needs to be called before generate as it sets
@@ -166,6 +166,29 @@ validate TRUE, FALSE, FALSE, FALSE
166166
aarch64 = fcmeq
167167
generate float32x2_t:uint32x2_t, float32x4_t:uint32x4_t, float64x1_t:uint64x1_t, float64x2_t:uint64x2_t
168168

169+
////////////////////
170+
// Floating-point absolute value
171+
////////////////////
172+
173+
/// Floating-point absolute value
174+
name = vabs
175+
fn = simd_fabs
176+
a = -0.1, -2.2, -3.3, -6.6
177+
validate 0.1, 2.2, 3.3, 6.6
178+
179+
arm = vabs
180+
aarch64 = fabs
181+
generate float32x2_t:float32x2_t, float32x4_t:float32x4_t
182+
183+
/// Floating-point absolute value
184+
name = vabs
185+
fn = simd_fabs
186+
a = -0.1, -2.2, -3.3, -6.6
187+
validate 0.1, 2.2, 3.3, 6.6
188+
189+
aarch64 = fabs
190+
generate float64x1_t:float64x1_t, float64x2_t:float64x2_t
191+
169192
////////////////////
170193
// greater then
171194
////////////////////

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