Work around bug in simdarch-verify

Author: Licenser

.gitignore

@@ -2,3 +2,5 @@ Cargo.lock
 .*.swp
 target
 tags
+crates/stdarch-gen/aarch64.rs
+crates/stdarch-gen/arm.rs

crates/core_arch/src/arm/neon/generated.rs

@@ -2166,46 +2166,6 @@ pub unsafe fn vmulq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
     simd_mul(a, b)
 }
 
-/// Multiply
-#[inline]
-#[target_feature(enable = "neon")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(mul))]
-#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(mul))]
-pub unsafe fn vmul_s64(a: int64x1_t, b: int64x1_t) -> int64x1_t {
-    simd_mul(a, b)
-}
-
-/// Multiply
-#[inline]
-#[target_feature(enable = "neon")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(mul))]
-#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(mul))]
-pub unsafe fn vmulq_s64(a: int64x2_t, b: int64x2_t) -> int64x2_t {
-    simd_mul(a, b)
-}
-
-/// Multiply
-#[inline]
-#[target_feature(enable = "neon")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(mul))]
-#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(mul))]
-pub unsafe fn vmul_u64(a: uint64x1_t, b: uint64x1_t) -> uint64x1_t {
-    simd_mul(a, b)
-}
-
-/// Multiply
-#[inline]
-#[target_feature(enable = "neon")]
-#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(mul))]
-#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(mul))]
-pub unsafe fn vmulq_u64(a: uint64x2_t, b: uint64x2_t) -> uint64x2_t {
-    simd_mul(a, b)
-}
-
 /// Multiply
 #[inline]
 #[target_feature(enable = "neon")]
@@ -4413,56 +4373,20 @@ mod test {
         assert_eq!(r, e);
     }
 
-    #[simd_test(enable = "neon")]
-    unsafe fn test_vmul_s64() {
-        let a: i64x1 = i64x1::new(1);
-        let b: i64x1 = i64x1::new(1);
-        let e: i64x1 = i64x1::new(1);
-        let r: i64x1 = transmute(vmul_s64(transmute(a), transmute(b)));
-        assert_eq!(r, e);
-    }
-
-    #[simd_test(enable = "neon")]
-    unsafe fn test_vmulq_s64() {
-        let a: i64x2 = i64x2::new(1, 2);
-        let b: i64x2 = i64x2::new(1, 2);
-        let e: i64x2 = i64x2::new(1, 4);
-        let r: i64x2 = transmute(vmulq_s64(transmute(a), transmute(b)));
-        assert_eq!(r, e);
-    }
-
-    #[simd_test(enable = "neon")]
-    unsafe fn test_vmul_u64() {
-        let a: u64x1 = u64x1::new(1);
-        let b: u64x1 = u64x1::new(1);
-        let e: u64x1 = u64x1::new(1);
-        let r: u64x1 = transmute(vmul_u64(transmute(a), transmute(b)));
-        assert_eq!(r, e);
-    }
-
-    #[simd_test(enable = "neon")]
-    unsafe fn test_vmulq_u64() {
-        let a: u64x2 = u64x2::new(1, 2);
-        let b: u64x2 = u64x2::new(1, 2);
-        let e: u64x2 = u64x2::new(1, 4);
-        let r: u64x2 = transmute(vmulq_u64(transmute(a), transmute(b)));
-        assert_eq!(r, e);
-    }
-
     #[simd_test(enable = "neon")]
     unsafe fn test_vmul_f32() {
         let a: f32x2 = f32x2::new(1.0, 2.0);
-        let b: f32x2 = f32x2::new(1.0, 2.0);
-        let e: f32x2 = f32x2::new(1.0, 4.0);
+        let b: f32x2 = f32x2::new(2.0, 3.0);
+        let e: f32x2 = f32x2::new(2.0, 6.0);
         let r: f32x2 = transmute(vmul_f32(transmute(a), transmute(b)));
         assert_eq!(r, e);
     }
 
     #[simd_test(enable = "neon")]
     unsafe fn test_vmulq_f32() {
         let a: f32x4 = f32x4::new(1.0, 2.0, 1.0, 2.0);
-        let b: f32x4 = f32x4::new(1.0, 2.0, 3.0, 4.0);
-        let e: f32x4 = f32x4::new(1.0, 4.0, 3.0, 8.0);
+        let b: f32x4 = f32x4::new(2.0, 3.0, 4.0, 5.0);
+        let e: f32x4 = f32x4::new(2.0, 6.0, 4.0, 10.0);
         let r: f32x4 = transmute(vmulq_f32(transmute(a), transmute(b)));
         assert_eq!(r, e);
     }

crates/core_arch/src/arm/neon/mod.rs

@@ -1274,6 +1274,9 @@ pub unsafe fn vmovq_n_u8(value: u8) -> uint8x16_t {
 #[inline]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
+// This doesn't actually has an assembly instruction but simdarch-verify
+//requires it to have one ... it's a function so it returns.
+#[cfg_attr(test, assert_instr(ret))]
 pub unsafe fn vreinterpret_u64_u32(a: uint32x2_t) -> uint64x1_t {
     transmute(a)
 }
@@ -1282,6 +1285,9 @@ pub unsafe fn vreinterpret_u64_u32(a: uint32x2_t) -> uint64x1_t {
 #[inline]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
+// This doesn't actually has an assembly instruction but simdarch-verify
+//requires it to have one ... it's a function so it returns.
+#[cfg_attr(test, assert_instr(ret))]
 pub unsafe fn vreinterpretq_s8_u8(a: uint8x16_t) -> int8x16_t {
     transmute(a)
 }
@@ -1290,6 +1296,9 @@ pub unsafe fn vreinterpretq_s8_u8(a: uint8x16_t) -> int8x16_t {
 #[inline]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
+// This doesn't actually has an assembly instruction but simdarch-verify
+//requires it to have one ... it's a function so it returns.
+#[cfg_attr(test, assert_instr(ret))]
 pub unsafe fn vreinterpretq_u16_u8(a: uint8x16_t) -> uint16x8_t {
     transmute(a)
 }
@@ -1298,6 +1307,9 @@ pub unsafe fn vreinterpretq_u16_u8(a: uint8x16_t) -> uint16x8_t {
 #[inline]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
+// This doesn't actually has an assembly instruction but simdarch-verify
+//requires it to have one ... it's a function so it returns.
+#[cfg_attr(test, assert_instr(ret))]
 pub unsafe fn vreinterpretq_u32_u8(a: uint8x16_t) -> uint32x4_t {
     transmute(a)
 }
@@ -1306,6 +1318,9 @@ pub unsafe fn vreinterpretq_u32_u8(a: uint8x16_t) -> uint32x4_t {
 #[inline]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
+// This doesn't actually has an assembly instruction but simdarch-verify
+//requires it to have one ... it's a function so it returns.
+#[cfg_attr(test, assert_instr(ret))]
 pub unsafe fn vreinterpretq_u64_u8(a: uint8x16_t) -> uint64x2_t {
     transmute(a)
 }
@@ -1314,6 +1329,9 @@ pub unsafe fn vreinterpretq_u64_u8(a: uint8x16_t) -> uint64x2_t {
 #[inline]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
+// This doesn't actually has an assembly instruction but simdarch-verify
+//requires it to have one ... it's a function so it returns.
+#[cfg_attr(test, assert_instr(ret))]
 pub unsafe fn vreinterpretq_u8_s8(a: uint8x16_t) -> uint8x16_t {
     transmute(a)
 }