Combine assembly mask reduce tests for x86 and aarch64

Author: jhorstmann

tests/assembly/aarch64-simd-mask-reduce.rs

@@ -0,0 +1,47 @@
+// verify that simd mask reductions do not introduce additional bit shift operations
+// revisions: x86 aarch64
+// [x86] compile-flags: --target=x86_64-unknown-linux-gnu -C llvm-args=-x86-asm-syntax=intel
+// [x86] needs-llvm-components: x86
+// [aarch64] compile-flags: --target=aarch64-unknown-linux-gnu
+// [aarch64] needs-llvm-components: aarch64
+// assembly-output: emit-asm
+// compile-flags: --crate-type=lib -O
+
+#![feature(no_core, lang_items, repr_simd, platform_intrinsics)]
+#![no_core]
+#![allow(non_camel_case_types)]
+
+// Because we don't have core yet.
+#[lang = "sized"]
+pub trait Sized {}
+
+#[lang = "copy"]
+trait Copy {}
+
+#[repr(simd)]
+pub struct mask8x16([i8; 16]);
+
+extern "platform-intrinsic" {
+    fn simd_reduce_all<T>(x: T) -> bool;
+    fn simd_reduce_any<T>(x: T) -> bool;
+}
+
+// CHECK-LABEL: mask_reduce_all:
+#[no_mangle]
+pub unsafe fn mask_reduce_all(m: mask8x16) -> bool {
+    // x86: movdqa
+    // x86-NEXT: pmovmskb
+    // aarch64: cmgt
+    // aarch64-NEXT: umaxv
+    simd_reduce_all(m)
+}
+
+// CHECK-LABEL: mask_reduce_any:
+#[no_mangle]
+pub unsafe fn mask_reduce_any(m: mask8x16) -> bool {
+    // x86: movdqa
+    // x86-NEXT: pmovmskb
+    // aarch64: cmlt
+    // aarch64-NEXT: umaxv
+    simd_reduce_any(m)
+}