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Implement _mm_srli_epi64
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src/intrinsics/llvm_x86.rs

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@@ -299,6 +299,23 @@ pub(crate) fn codegen_x86_llvm_intrinsic_call<'tcx>(
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_ => fx.bcx.ins().iconst(types::I32, 0),
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});
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}
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"llvm.x86.sse2.psrli.q" => {
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let (a, imm8) = match args {
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[a, imm8] => (a, imm8),
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_ => bug!("wrong number of args for intrinsic {intrinsic}"),
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};
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let a = codegen_operand(fx, a);
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let imm8 = crate::constant::mir_operand_get_const_val(fx, imm8)
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.expect("llvm.x86.avx.psrli.q imm8 not const");
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simd_for_each_lane(fx, a, ret, &|fx, _lane_ty, _res_lane_ty, lane| match imm8
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.try_to_bits(Size::from_bytes(4))
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.unwrap_or_else(|| panic!("imm8 not scalar: {:?}", imm8))
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{
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imm8 if imm8 < 32 => fx.bcx.ins().ushr_imm(lane, i64::from(imm8 as u8)),
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_ => fx.bcx.ins().iconst(types::I32, 0),
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});
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}
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"llvm.x86.avx.pslli.d" => {
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let (a, imm8) = match args {
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[a, imm8] => (a, imm8),

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