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Perform aarch64 div/rem as scalar op
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+9
-33
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1 file changed

+9
-33
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crates/core_simd/src/ops.rs

Lines changed: 9 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -77,7 +77,7 @@ macro_rules! int_divrem_guard {
7777
( $lhs:ident,
7878
$rhs:ident,
7979
{ const PANIC_ZERO: &'static str = $zero:literal;
80-
$simd_call:ident
80+
$simd_call:ident, $op:tt
8181
},
8282
$int:ident ) => {
8383
if $rhs.simd_eq(Simd::splat(0 as _)).any() {
@@ -97,39 +97,15 @@ macro_rules! int_divrem_guard {
9797
$rhs
9898
};
9999

100-
// aarch64 fails for arbitrary `v % 0` for non-powers-of-two
100+
// aarch64 div fails for arbitrary `v % 0`, mod fails when rhs is MIN, for non-powers-of-two
101+
// these operations aren't vectorized on aarch64 anyway
101102
#[cfg(target_arch = "aarch64")]
102103
{
103-
const { assert!(Self::LEN <= 64) };
104-
if Self::LEN == 1 {
105-
// Safety: $lhs and rhs are vectors
106-
let x: Simd::<_, 1> = unsafe { core::intrinsics::simd::$simd_call($lhs.resize::<1>(Default::default()), rhs.resize::<1>(Default::default())) };
107-
x.resize(Default::default())
108-
} else if Self::LEN <= 2 {
109-
// Safety: $lhs and rhs are vectors
110-
let x: Simd::<_, 2> = unsafe { core::intrinsics::simd::$simd_call($lhs.resize::<2>(Default::default()), rhs.resize::<2>(Default::default())) };
111-
x.resize(Default::default())
112-
} else if Self::LEN <= 4 {
113-
// Safety: $lhs and rhs are vectors
114-
let x: Simd::<_, 4> = unsafe { core::intrinsics::simd::$simd_call($lhs.resize::<4>(Default::default()), rhs.resize::<4>(Default::default())) };
115-
x.resize(Default::default())
116-
} else if Self::LEN <= 8 {
117-
// Safety: $lhs and rhs are vectors
118-
let x: Simd::<_, 8> = unsafe { core::intrinsics::simd::$simd_call($lhs.resize::<8>(Default::default()), rhs.resize::<8>(Default::default())) };
119-
x.resize(Default::default())
120-
} else if Self::LEN <= 16 {
121-
// Safety: $lhs and rhs are vectors
122-
let x: Simd::<_, 16> = unsafe { core::intrinsics::simd::$simd_call($lhs.resize::<16>(Default::default()), rhs.resize::<16>(Default::default())) };
123-
x.resize(Default::default())
124-
} else if Self::LEN <= 32 {
125-
// Safety: $lhs and rhs are vectors
126-
let x: Simd::<_, 32> = unsafe { core::intrinsics::simd::$simd_call($lhs.resize::<32>(Default::default()), rhs.resize::<32>(Default::default())) };
127-
x.resize(Default::default())
128-
} else {
129-
// Safety: $lhs and rhs are vectors
130-
let x: Simd::<_, 64> = unsafe { core::intrinsics::simd::$simd_call($lhs.resize::<64>(Default::default()), rhs.resize::<64>(Default::default())) };
131-
x.resize(Default::default())
104+
let mut out = Simd::splat(0 as _);
105+
for i in 0..Self::LEN {
106+
out[i] = $lhs[i] $op rhs[i];
132107
}
108+
out
133109
}
134110

135111
#[cfg(not(target_arch = "aarch64"))]
@@ -244,14 +220,14 @@ for_base_ops! {
244220
impl Div::div {
245221
int_divrem_guard {
246222
const PANIC_ZERO: &'static str = "attempt to divide by zero";
247-
simd_div
223+
simd_div, /
248224
}
249225
}
250226

251227
impl Rem::rem {
252228
int_divrem_guard {
253229
const PANIC_ZERO: &'static str = "attempt to calculate the remainder with a divisor of zero";
254-
simd_rem
230+
simd_rem, %
255231
}
256232
}
257233

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