Skip to content

Commit 856185d

Browse files
committed
hir, mir: Separate HIR expressions / MIR operands from InlineAsm.
1 parent 415d95f commit 856185d

File tree

22 files changed

+176
-209
lines changed

22 files changed

+176
-209
lines changed

src/librustc/middle/cfg/construct.rs

Lines changed: 4 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -354,19 +354,10 @@ impl<'a, 'tcx> CFGBuilder<'a, 'tcx> {
354354
self.straightline(expr, pred, Some(&**e).into_iter())
355355
}
356356

357-
hir::ExprInlineAsm(ref inline_asm) => {
358-
let inputs = inline_asm.inputs.iter();
359-
let outputs = inline_asm.outputs.iter();
360-
let post_inputs = self.exprs(inputs.map(|a| {
361-
debug!("cfg::construct InlineAsm id:{} input:{:?}", expr.id, a);
362-
let &(_, ref expr) = a;
363-
&**expr
364-
}), pred);
365-
let post_outputs = self.exprs(outputs.map(|a| {
366-
debug!("cfg::construct InlineAsm id:{} output:{:?}", expr.id, a);
367-
&*a.expr
368-
}), post_inputs);
369-
self.add_ast_node(expr.id, &[post_outputs])
357+
hir::ExprInlineAsm(_, ref outputs, ref inputs) => {
358+
let post_outputs = self.exprs(outputs.iter().map(|e| &**e), pred);
359+
let post_inputs = self.exprs(inputs.iter().map(|e| &**e), post_outputs);
360+
self.add_ast_node(expr.id, &[post_inputs])
370361
}
371362

372363
hir::ExprClosure(..) |

src/librustc/middle/expr_use_visitor.rs

Lines changed: 7 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -449,23 +449,20 @@ impl<'d,'t,'a,'tcx> ExprUseVisitor<'d,'t,'a,'tcx> {
449449
}
450450
}
451451

452-
hir::ExprInlineAsm(ref ia) => {
453-
for &(_, ref input) in &ia.inputs {
454-
self.consume_expr(&input);
455-
}
456-
457-
for output in &ia.outputs {
458-
if output.is_indirect {
459-
self.consume_expr(&output.expr);
452+
hir::ExprInlineAsm(ref ia, ref outputs, ref inputs) => {
453+
for (o, output) in ia.outputs.iter().zip(outputs) {
454+
if o.is_indirect {
455+
self.consume_expr(output);
460456
} else {
461-
self.mutate_expr(expr, &output.expr,
462-
if output.is_rw {
457+
self.mutate_expr(expr, output,
458+
if o.is_rw {
463459
MutateMode::WriteAndRead
464460
} else {
465461
MutateMode::JustWrite
466462
});
467463
}
468464
}
465+
self.consume_exprs(inputs);
469466
}
470467

471468
hir::ExprBreak(..) |

src/librustc/middle/liveness.rs

Lines changed: 20 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -1170,25 +1170,21 @@ impl<'a, 'tcx> Liveness<'a, 'tcx> {
11701170
self.propagate_through_expr(&e, succ)
11711171
}
11721172

1173-
hir::ExprInlineAsm(ref ia) => {
1174-
1175-
let succ = ia.outputs.iter().rev().fold(succ,
1176-
|succ, out| {
1177-
// see comment on lvalues
1178-
// in propagate_through_lvalue_components()
1179-
if out.is_indirect {
1180-
self.propagate_through_expr(&out.expr, succ)
1181-
} else {
1182-
let acc = if out.is_rw { ACC_WRITE|ACC_READ } else { ACC_WRITE };
1183-
let succ = self.write_lvalue(&out.expr, succ, acc);
1184-
self.propagate_through_lvalue_components(&out.expr, succ)
1185-
}
1173+
hir::ExprInlineAsm(ref ia, ref outputs, ref inputs) => {
1174+
let succ = ia.outputs.iter().zip(outputs).rev().fold(succ, |succ, (o, output)| {
1175+
// see comment on lvalues
1176+
// in propagate_through_lvalue_components()
1177+
if o.is_indirect {
1178+
self.propagate_through_expr(output, succ)
1179+
} else {
1180+
let acc = if o.is_rw { ACC_WRITE|ACC_READ } else { ACC_WRITE };
1181+
let succ = self.write_lvalue(output, succ, acc);
1182+
self.propagate_through_lvalue_components(output, succ)
11861183
}
1187-
);
1184+
});
1185+
11881186
// Inputs are executed first. Propagate last because of rev order
1189-
ia.inputs.iter().rev().fold(succ, |succ, &(_, ref expr)| {
1190-
self.propagate_through_expr(&expr, succ)
1191-
})
1187+
self.propagate_through_exprs(inputs, succ)
11921188
}
11931189

11941190
hir::ExprLit(..) => {
@@ -1425,17 +1421,17 @@ fn check_expr(this: &mut Liveness, expr: &Expr) {
14251421
intravisit::walk_expr(this, expr);
14261422
}
14271423

1428-
hir::ExprInlineAsm(ref ia) => {
1429-
for &(_, ref input) in &ia.inputs {
1430-
this.visit_expr(&input);
1424+
hir::ExprInlineAsm(ref ia, ref outputs, ref inputs) => {
1425+
for input in inputs {
1426+
this.visit_expr(input);
14311427
}
14321428

14331429
// Output operands must be lvalues
1434-
for out in &ia.outputs {
1435-
if !out.is_indirect {
1436-
this.check_lvalue(&out.expr);
1430+
for (o, output) in ia.outputs.iter().zip(outputs) {
1431+
if !o.is_indirect {
1432+
this.check_lvalue(output);
14371433
}
1438-
this.visit_expr(&out.expr);
1434+
this.visit_expr(output);
14391435
}
14401436

14411437
intravisit::walk_expr(this, expr);

src/librustc/mir/repr.rs

Lines changed: 8 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -680,7 +680,11 @@ pub enum Rvalue<'tcx> {
680680
from_end: usize,
681681
},
682682

683-
InlineAsm(InlineAsm),
683+
InlineAsm {
684+
asm: InlineAsm,
685+
outputs: Vec<Lvalue<'tcx>>,
686+
inputs: Vec<Operand<'tcx>>
687+
}
684688
}
685689

686690
#[derive(Clone, Copy, Debug, PartialEq, Eq, RustcEncodable, RustcDecodable)]
@@ -765,7 +769,9 @@ impl<'tcx> Debug for Rvalue<'tcx> {
765769
BinaryOp(ref op, ref a, ref b) => write!(fmt, "{:?}({:?}, {:?})", op, a, b),
766770
UnaryOp(ref op, ref a) => write!(fmt, "{:?}({:?})", op, a),
767771
Box(ref t) => write!(fmt, "Box({:?})", t),
768-
InlineAsm(ref asm) => write!(fmt, "InlineAsm({:?})", asm),
772+
InlineAsm { ref asm, ref outputs, ref inputs } => {
773+
write!(fmt, "asm!({:?} : {:?} : {:?})", asm, outputs, inputs)
774+
}
769775
Slice { ref input, from_start, from_end } =>
770776
write!(fmt, "{:?}[{:?}..-{:?}]", input, from_start, from_end),
771777

src/librustc/mir/tcx.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -220,7 +220,7 @@ impl<'tcx> Mir<'tcx> {
220220
}
221221
}
222222
Rvalue::Slice { .. } => None,
223-
Rvalue::InlineAsm(..) => None
223+
Rvalue::InlineAsm { .. } => None
224224
}
225225
}
226226
}

src/librustc/mir/visit.rs

Lines changed: 8 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -261,7 +261,14 @@ macro_rules! make_mir_visitor {
261261
});
262262
}
263263

264-
Rvalue::InlineAsm(_) => {
264+
Rvalue::InlineAsm { ref $($mutability)* outputs,
265+
ref $($mutability)* inputs, .. } => {
266+
for output in & $($mutability)* outputs[..] {
267+
self.visit_lvalue(output, LvalueContext::Store);
268+
}
269+
for input in & $($mutability)* inputs[..] {
270+
self.visit_operand(input);
271+
}
265272
}
266273
}
267274
}

src/librustc_back/svh.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -279,7 +279,7 @@ mod svh_visitor {
279279
ExprBreak(id) => SawExprBreak(id.map(|id| id.node.name.as_str())),
280280
ExprAgain(id) => SawExprAgain(id.map(|id| id.node.name.as_str())),
281281
ExprRet(..) => SawExprRet,
282-
ExprInlineAsm(ref asm) => SawExprInlineAsm(asm),
282+
ExprInlineAsm(ref a,_,_) => SawExprInlineAsm(a),
283283
ExprStruct(..) => SawExprStruct,
284284
ExprRepeat(..) => SawExprRepeat,
285285
}

src/librustc_front/fold.rs

Lines changed: 5 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -1107,34 +1107,11 @@ pub fn noop_fold_expr<T: Folder>(Expr { id, node, span, attrs }: Expr, folder: &
11071107
respan(folder.new_span(label.span), folder.fold_ident(label.node))
11081108
})),
11091109
ExprRet(e) => ExprRet(e.map(|x| folder.fold_expr(x))),
1110-
ExprInlineAsm(InlineAsm {
1111-
inputs,
1112-
outputs,
1113-
asm,
1114-
asm_str_style,
1115-
clobbers,
1116-
volatile,
1117-
alignstack,
1118-
dialect,
1119-
expn_id,
1120-
}) => ExprInlineAsm(InlineAsm {
1121-
inputs: inputs.move_map(|(c, input)| (c, folder.fold_expr(input))),
1122-
outputs: outputs.move_map(|out| {
1123-
InlineAsmOutput {
1124-
constraint: out.constraint,
1125-
expr: folder.fold_expr(out.expr),
1126-
is_rw: out.is_rw,
1127-
is_indirect: out.is_indirect,
1128-
}
1129-
}),
1130-
asm: asm,
1131-
asm_str_style: asm_str_style,
1132-
clobbers: clobbers,
1133-
volatile: volatile,
1134-
alignstack: alignstack,
1135-
dialect: dialect,
1136-
expn_id: expn_id,
1137-
}),
1110+
ExprInlineAsm(asm, outputs, inputs) => {
1111+
ExprInlineAsm(asm,
1112+
outputs.move_map(|x| folder.fold_expr(x)),
1113+
inputs.move_map(|x| folder.fold_expr(x)))
1114+
}
11381115
ExprStruct(path, fields, maybe_expr) => {
11391116
ExprStruct(folder.fold_path(path),
11401117
fields.move_map(|x| folder.fold_field(x)),

src/librustc_front/hir.rs

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -793,8 +793,8 @@ pub enum Expr_ {
793793
/// A `return`, with an optional value to be returned
794794
ExprRet(Option<P<Expr>>),
795795

796-
/// Output of the `asm!()` macro
797-
ExprInlineAsm(InlineAsm),
796+
/// Inline assembly (from `asm!`), with its outputs and inputs.
797+
ExprInlineAsm(InlineAsm, Vec<P<Expr>>, Vec<P<Expr>>),
798798

799799
/// A struct literal expression.
800800
///
@@ -978,7 +978,6 @@ pub enum Ty_ {
978978
#[derive(Clone, PartialEq, Eq, RustcEncodable, RustcDecodable, Hash, Debug)]
979979
pub struct InlineAsmOutput {
980980
pub constraint: InternedString,
981-
pub expr: P<Expr>,
982981
pub is_rw: bool,
983982
pub is_indirect: bool,
984983
}
@@ -988,7 +987,7 @@ pub struct InlineAsm {
988987
pub asm: InternedString,
989988
pub asm_str_style: StrStyle,
990989
pub outputs: HirVec<InlineAsmOutput>,
991-
pub inputs: HirVec<(InternedString, P<Expr>)>,
990+
pub inputs: HirVec<InternedString>,
992991
pub clobbers: HirVec<InternedString>,
993992
pub volatile: bool,
994993
pub alignstack: bool,

src/librustc_front/intravisit.rs

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -798,12 +798,12 @@ pub fn walk_expr<'v, V: Visitor<'v>>(visitor: &mut V, expression: &'v Expr) {
798798
ExprRet(ref optional_expression) => {
799799
walk_list!(visitor, visit_expr, optional_expression);
800800
}
801-
ExprInlineAsm(ref ia) => {
802-
for &(_, ref input) in &ia.inputs {
803-
visitor.visit_expr(&input)
801+
ExprInlineAsm(_, ref outputs, ref inputs) => {
802+
for output in outputs {
803+
visitor.visit_expr(output)
804804
}
805-
for output in &ia.outputs {
806-
visitor.visit_expr(&output.expr)
805+
for input in inputs {
806+
visitor.visit_expr(input)
807807
}
808808
}
809809
}

0 commit comments

Comments
 (0)