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Rollup merge of #95202 - Urgau:check-cfg-perf-well-known-values, r=petrochenkov
Reduce the cost of loading all built-ins targets This PR started by measuring the exact slowdown of checking of well known conditional values. Than this PR implemented some technics to reduce the cost of loading all built-ins targets. cf. #82450 (comment)
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compiler/rustc_codegen_cranelift/src/driver/aot.rs

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -304,8 +304,12 @@ pub(crate) fn run_aot(
304304
};
305305

306306
// FIXME handle `-Ctarget-cpu=native`
307-
let target_cpu =
308-
tcx.sess.opts.cg.target_cpu.as_ref().unwrap_or(&tcx.sess.target.cpu).to_owned();
307+
let target_cpu = match tcx.sess.opts.cg.target_cpu {
308+
Some(ref name) => name,
309+
None => tcx.sess.target.cpu.as_ref(),
310+
}
311+
.to_owned();
312+
309313
Box::new((
310314
CodegenResults {
311315
modules,

compiler/rustc_codegen_gcc/src/lib.rs

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -287,8 +287,10 @@ fn handle_native(name: &str) -> &str {
287287
}
288288

289289
pub fn target_cpu(sess: &Session) -> &str {
290-
let name = sess.opts.cg.target_cpu.as_ref().unwrap_or(&sess.target.cpu);
291-
handle_native(name)
290+
match sess.opts.cg.target_cpu {
291+
Some(ref name) => handle_native(name),
292+
None => handle_native(sess.target.cpu.as_ref()),
293+
}
292294
}
293295

294296
pub fn target_features(sess: &Session) -> Vec<Symbol> {

compiler/rustc_codegen_llvm/src/attributes.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -116,7 +116,7 @@ fn instrument_function_attr<'ll>(cx: &CodegenCx<'ll, '_>) -> Option<&'ll Attribu
116116

117117
// The function name varies on platforms.
118118
// See test/CodeGen/mcount.c in clang.
119-
let mcount_name = cx.sess().target.mcount.as_str();
119+
let mcount_name = cx.sess().target.mcount.as_ref();
120120

121121
Some(llvm::CreateAttrStringValue(
122122
cx.llcx,

compiler/rustc_codegen_llvm/src/builder.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1452,7 +1452,7 @@ impl<'a, 'll, 'tcx> Builder<'a, 'll, 'tcx> {
14521452
}
14531453

14541454
fn fptoint_sat_broken_in_llvm(&self) -> bool {
1455-
match self.tcx.sess.target.arch.as_str() {
1455+
match self.tcx.sess.target.arch.as_ref() {
14561456
// FIXME - https://bugs.llvm.org/show_bug.cgi?id=50083
14571457
"riscv64" => llvm_util::get_version() < (13, 0, 0),
14581458
_ => false,

compiler/rustc_codegen_llvm/src/context.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -134,7 +134,7 @@ pub unsafe fn create_module<'ll>(
134134
let mod_name = SmallCStr::new(mod_name);
135135
let llmod = llvm::LLVMModuleCreateWithNameInContext(mod_name.as_ptr(), llcx);
136136

137-
let mut target_data_layout = sess.target.data_layout.clone();
137+
let mut target_data_layout = sess.target.data_layout.to_string();
138138
let llvm_version = llvm_util::get_version();
139139
if llvm_version < (13, 0, 0) {
140140
if sess.target.arch == "powerpc64" {
@@ -859,7 +859,7 @@ impl<'ll> CodegenCx<'ll, '_> {
859859

860860
// This isn't an "LLVM intrinsic", but LLVM's optimization passes
861861
// recognize it like one and we assume it exists in `core::slice::cmp`
862-
match self.sess().target.arch.as_str() {
862+
match self.sess().target.arch.as_ref() {
863863
"avr" | "msp430" => ifn!("memcmp", fn(i8p, i8p, t_isize) -> t_i16),
864864
_ => ifn!("memcmp", fn(i8p, i8p, t_isize) -> t_i32),
865865
}

compiler/rustc_codegen_llvm/src/intrinsic.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -329,7 +329,7 @@ impl<'ll, 'tcx> IntrinsicCallMethods<'tcx> for Builder<'_, 'll, 'tcx> {
329329
let b_ptr = self.bitcast(b, i8p_ty);
330330
let n = self.const_usize(layout.size().bytes());
331331
let cmp = self.call_intrinsic("memcmp", &[a_ptr, b_ptr, n]);
332-
match self.cx.sess().target.arch.as_str() {
332+
match self.cx.sess().target.arch.as_ref() {
333333
"avr" | "msp430" => self.icmp(IntPredicate::IntEQ, cmp, self.const_i16(0)),
334334
_ => self.icmp(IntPredicate::IntEQ, cmp, self.const_i32(0)),
335335
}

compiler/rustc_codegen_llvm/src/llvm_util.rs

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -61,8 +61,8 @@ unsafe fn configure_llvm(sess: &Session) {
6161
full_arg.trim().split(|c: char| c == '=' || c.is_whitespace()).next().unwrap_or("")
6262
}
6363

64-
let cg_opts = sess.opts.cg.llvm_args.iter();
65-
let tg_opts = sess.target.llvm_args.iter();
64+
let cg_opts = sess.opts.cg.llvm_args.iter().map(AsRef::as_ref);
65+
let tg_opts = sess.target.llvm_args.iter().map(AsRef::as_ref);
6666
let sess_args = cg_opts.chain(tg_opts);
6767

6868
let user_specified_args: FxHashSet<_> =
@@ -375,8 +375,10 @@ fn handle_native(name: &str) -> &str {
375375
}
376376

377377
pub fn target_cpu(sess: &Session) -> &str {
378-
let name = sess.opts.cg.target_cpu.as_ref().unwrap_or(&sess.target.cpu);
379-
handle_native(name)
378+
match sess.opts.cg.target_cpu {
379+
Some(ref name) => handle_native(name),
380+
None => handle_native(sess.target.cpu.as_ref()),
381+
}
380382
}
381383

382384
/// The list of LLVM features computed from CLI flags (`-Ctarget-cpu`, `-Ctarget-feature`,

compiler/rustc_codegen_ssa/src/back/link.rs

Lines changed: 16 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -40,6 +40,7 @@ use std::ffi::OsString;
4040
use std::fs::{File, OpenOptions};
4141
use std::io::{BufWriter, Write};
4242
use std::lazy::OnceCell;
43+
use std::ops::Deref;
4344
use std::path::{Path, PathBuf};
4445
use std::process::{ExitStatus, Output, Stdio};
4546
use std::{ascii, char, env, fmt, fs, io, mem, str};
@@ -674,11 +675,11 @@ fn link_natively<'a, B: ArchiveBuilder<'a>>(
674675

675676
linker::disable_localization(&mut cmd);
676677

677-
for &(ref k, ref v) in &sess.target.link_env {
678-
cmd.env(k, v);
678+
for &(ref k, ref v) in sess.target.link_env.as_ref() {
679+
cmd.env(k.as_ref(), v.as_ref());
679680
}
680-
for k in &sess.target.link_env_remove {
681-
cmd.env_remove(k);
681+
for k in sess.target.link_env_remove.as_ref() {
682+
cmd.env_remove(k.as_ref());
682683
}
683684

684685
if sess.opts.prints.contains(&PrintRequest::LinkArgs) {
@@ -1216,7 +1217,7 @@ pub fn linker_and_flavor(sess: &Session) -> (PathBuf, LinkerFlavor) {
12161217

12171218
if let Some(ret) = infer_from(
12181219
sess,
1219-
sess.target.linker.clone().map(PathBuf::from),
1220+
sess.target.linker.as_deref().map(PathBuf::from),
12201221
Some(sess.target.linker_flavor),
12211222
) {
12221223
return ret;
@@ -1586,7 +1587,7 @@ fn add_post_link_objects(
15861587
/// FIXME: Determine where exactly these args need to be inserted.
15871588
fn add_pre_link_args(cmd: &mut dyn Linker, sess: &Session, flavor: LinkerFlavor) {
15881589
if let Some(args) = sess.target.pre_link_args.get(&flavor) {
1589-
cmd.args(args);
1590+
cmd.args(args.iter().map(Deref::deref));
15901591
}
15911592
cmd.args(&sess.opts.debugging_opts.pre_link_args);
15921593
}
@@ -1602,7 +1603,7 @@ fn add_link_script(cmd: &mut dyn Linker, sess: &Session, tmpdir: &Path, crate_ty
16021603
let file_name = ["rustc", &sess.target.llvm_target, "linkfile.ld"].join("-");
16031604

16041605
let path = tmpdir.join(file_name);
1605-
if let Err(e) = fs::write(&path, script) {
1606+
if let Err(e) = fs::write(&path, script.as_ref()) {
16061607
sess.fatal(&format!("failed to write link script to {}: {}", path.display(), e));
16071608
}
16081609

@@ -1634,23 +1635,23 @@ fn add_late_link_args(
16341635
});
16351636
if any_dynamic_crate {
16361637
if let Some(args) = sess.target.late_link_args_dynamic.get(&flavor) {
1637-
cmd.args(args);
1638+
cmd.args(args.iter().map(Deref::deref));
16381639
}
16391640
} else {
16401641
if let Some(args) = sess.target.late_link_args_static.get(&flavor) {
1641-
cmd.args(args);
1642+
cmd.args(args.iter().map(Deref::deref));
16421643
}
16431644
}
16441645
if let Some(args) = sess.target.late_link_args.get(&flavor) {
1645-
cmd.args(args);
1646+
cmd.args(args.iter().map(Deref::deref));
16461647
}
16471648
}
16481649

16491650
/// Add arbitrary "post-link" args defined by the target spec.
16501651
/// FIXME: Determine where exactly these args need to be inserted.
16511652
fn add_post_link_args(cmd: &mut dyn Linker, sess: &Session, flavor: LinkerFlavor) {
16521653
if let Some(args) = sess.target.post_link_args.get(&flavor) {
1653-
cmd.args(args);
1654+
cmd.args(args.iter().map(Deref::deref));
16541655
}
16551656
}
16561657

@@ -1960,8 +1961,8 @@ fn add_order_independent_options(
19601961
cmd.arg(&codegen_results.crate_info.target_cpu);
19611962
cmd.arg("--cpu-features");
19621963
cmd.arg(match &sess.opts.cg.target_feature {
1963-
feat if !feat.is_empty() => feat,
1964-
_ => &sess.target.options.features,
1964+
feat if !feat.is_empty() => feat.as_ref(),
1965+
_ => sess.target.options.features.as_ref(),
19651966
});
19661967
}
19671968

@@ -2478,12 +2479,12 @@ fn add_apple_sdk(cmd: &mut dyn Linker, sess: &Session, flavor: LinkerFlavor) {
24782479
let os = &sess.target.os;
24792480
let llvm_target = &sess.target.llvm_target;
24802481
if sess.target.vendor != "apple"
2481-
|| !matches!(os.as_str(), "ios" | "tvos")
2482+
|| !matches!(os.as_ref(), "ios" | "tvos")
24822483
|| flavor != LinkerFlavor::Gcc
24832484
{
24842485
return;
24852486
}
2486-
let sdk_name = match (arch.as_str(), os.as_str()) {
2487+
let sdk_name = match (arch.as_ref(), os.as_ref()) {
24872488
("aarch64", "tvos") => "appletvos",
24882489
("x86_64", "tvos") => "appletvsimulator",
24892490
("arm", "ios") => "iphoneos",

compiler/rustc_codegen_ssa/src/back/linker.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -75,7 +75,7 @@ pub fn get_linker<'a>(
7575
if let Some(ref tool) = msvc_tool {
7676
let original_path = tool.path();
7777
if let Some(ref root_lib_path) = original_path.ancestors().nth(4) {
78-
let arch = match t.arch.as_str() {
78+
let arch = match t.arch.as_ref() {
7979
"x86_64" => Some("x64"),
8080
"x86" => Some("x86"),
8181
"aarch64" => Some("arm64"),
@@ -1520,7 +1520,7 @@ impl<'a> L4Bender<'a> {
15201520

15211521
pub(crate) fn exported_symbols(tcx: TyCtxt<'_>, crate_type: CrateType) -> Vec<String> {
15221522
if let Some(ref exports) = tcx.sess.target.override_export_symbols {
1523-
return exports.clone();
1523+
return exports.iter().map(ToString::to_string).collect();
15241524
}
15251525

15261526
let mut symbols = Vec::new();

compiler/rustc_codegen_ssa/src/back/write.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -218,7 +218,7 @@ impl ModuleConfig {
218218
false
219219
),
220220
emit_obj,
221-
bc_cmdline: sess.target.bitcode_llvm_cmdline.clone(),
221+
bc_cmdline: sess.target.bitcode_llvm_cmdline.to_string(),
222222

223223
verify_llvm_ir: sess.verify_llvm_ir(),
224224
no_prepopulate_passes: sess.opts.cg.no_prepopulate_passes,
@@ -1061,7 +1061,7 @@ fn start_executing_work<B: ExtraBackendMethods>(
10611061
is_pe_coff: tcx.sess.target.is_like_windows,
10621062
target_can_use_split_dwarf: tcx.sess.target_can_use_split_dwarf(),
10631063
target_pointer_width: tcx.sess.target.pointer_width,
1064-
target_arch: tcx.sess.target.arch.clone(),
1064+
target_arch: tcx.sess.target.arch.to_string(),
10651065
debuginfo: tcx.sess.opts.debuginfo,
10661066
split_debuginfo: tcx.sess.split_debuginfo(),
10671067
split_dwarf_kind: tcx.sess.opts.debugging_opts.split_dwarf_kind,

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