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Rollup merge of #131807 - beetrees:riscv-target-abi, r=workingjubilee
Always specify `llvm_abiname` for RISC-V targets For RISC-V targets, when `llvm_abiname` is not specified LLVM will infer the ABI from the target features, causing #116344 to occur. This PR adds the correct `llvm_abiname` to all RISC-V targets where it is missing (which are all soft-float targets), and adds a test to prevent future RISC-V targets from accidentally omitting `llvm_abiname`. The only affect of this PR is that `-Ctarget-feature=+f` (or similar) will no longer affect the ABI on the modified targets. <!-- homu-ignore:start --> r? `@RalfJung` <!--- homu-ignore:end -->
2 parents 763fbf8 + 3ea91c0 commit 1b24c6f

16 files changed

+71
-1
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compiler/rustc_target/src/spec/targets/riscv32i_unknown_none_elf.rs

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@@ -20,6 +20,7 @@ pub(crate) fn target() -> Target {
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max_atomic_width: Some(32),
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atomic_cas: false,
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features: "+forced-atomics".into(),
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llvm_abiname: "ilp32".into(),
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panic_strategy: PanicStrategy::Abort,
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relocation_model: RelocModel::Static,
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emit_debug_gdb_scripts: false,

compiler/rustc_target/src/spec/targets/riscv32im_risc0_zkvm_elf.rs

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@@ -29,6 +29,7 @@ pub(crate) fn target() -> Target {
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atomic_cas: true,
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features: "+m".into(),
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llvm_abiname: "ilp32".into(),
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executables: true,
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panic_strategy: PanicStrategy::Abort,
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relocation_model: RelocModel::Static,

compiler/rustc_target/src/spec/targets/riscv32im_unknown_none_elf.rs

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@@ -20,6 +20,7 @@ pub(crate) fn target() -> Target {
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max_atomic_width: Some(32),
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atomic_cas: false,
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features: "+m,+forced-atomics".into(),
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llvm_abiname: "ilp32".into(),
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panic_strategy: PanicStrategy::Abort,
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relocation_model: RelocModel::Static,
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emit_debug_gdb_scripts: false,

compiler/rustc_target/src/spec/targets/riscv32ima_unknown_none_elf.rs

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@@ -19,6 +19,7 @@ pub(crate) fn target() -> Target {
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cpu: "generic-rv32".into(),
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max_atomic_width: Some(32),
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features: "+m,+a".into(),
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llvm_abiname: "ilp32".into(),
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panic_strategy: PanicStrategy::Abort,
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relocation_model: RelocModel::Static,
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emit_debug_gdb_scripts: false,

compiler/rustc_target/src/spec/targets/riscv32imac_esp_espidf.rs

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@@ -27,6 +27,7 @@ pub(crate) fn target() -> Target {
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atomic_cas: true,
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features: "+m,+a,+c".into(),
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llvm_abiname: "ilp32".into(),
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panic_strategy: PanicStrategy::Abort,
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relocation_model: RelocModel::Static,
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emit_debug_gdb_scripts: false,

compiler/rustc_target/src/spec/targets/riscv32imac_unknown_none_elf.rs

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@@ -19,6 +19,7 @@ pub(crate) fn target() -> Target {
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cpu: "generic-rv32".into(),
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max_atomic_width: Some(32),
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features: "+m,+a,+c".into(),
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llvm_abiname: "ilp32".into(),
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panic_strategy: PanicStrategy::Abort,
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relocation_model: RelocModel::Static,
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emit_debug_gdb_scripts: false,

compiler/rustc_target/src/spec/targets/riscv32imac_unknown_nuttx_elf.rs

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@@ -21,6 +21,7 @@ pub(crate) fn target() -> Target {
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cpu: "generic-rv32".into(),
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max_atomic_width: Some(32),
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features: "+m,+a,+c".into(),
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llvm_abiname: "ilp32".into(),
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panic_strategy: PanicStrategy::Unwind,
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relocation_model: RelocModel::Static,
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..Default::default()

compiler/rustc_target/src/spec/targets/riscv32imac_unknown_xous_elf.rs

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@@ -20,6 +20,7 @@ pub(crate) fn target() -> Target {
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cpu: "generic-rv32".into(),
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max_atomic_width: Some(32),
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features: "+m,+a,+c".into(),
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llvm_abiname: "ilp32".into(),
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panic_strategy: PanicStrategy::Unwind,
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relocation_model: RelocModel::Static,
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..Default::default()

compiler/rustc_target/src/spec/targets/riscv32imc_esp_espidf.rs

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@@ -30,6 +30,7 @@ pub(crate) fn target() -> Target {
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atomic_cas: true,
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features: "+m,+c".into(),
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llvm_abiname: "ilp32".into(),
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panic_strategy: PanicStrategy::Abort,
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relocation_model: RelocModel::Static,
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emit_debug_gdb_scripts: false,

compiler/rustc_target/src/spec/targets/riscv32imc_unknown_none_elf.rs

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@@ -20,6 +20,7 @@ pub(crate) fn target() -> Target {
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max_atomic_width: Some(32),
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atomic_cas: false,
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features: "+m,+c,+forced-atomics".into(),
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llvm_abiname: "ilp32".into(),
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panic_strategy: PanicStrategy::Abort,
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relocation_model: RelocModel::Static,
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emit_debug_gdb_scripts: false,

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