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1 parent 9be2665 commit a16b481Copy full SHA for a16b481
crates/core_simd/src/vector.rs
@@ -58,7 +58,7 @@ where
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}
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/// Reads from potentially discontiguous indices in `slice` to construct a SIMD vector.
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- /// Lanes given an out-of-bounds index instead select values from the `or` vector.
+ /// If an index is out-of-bounds, the lane is instead selected from the `or` vector.
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///
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/// # Examples
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/// ```
@@ -79,7 +79,7 @@ where
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- /// Lanes given an out-of-bounds index instead are set the default value for the type.
+ /// If an index is out-of-bounds, the lane is set to the default value for the type.
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