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Auto merge of #3363 - RalfJung:rustup, r=RalfJung
Rustup This should finally work again :)
2 parents ef2ae90 + 4b59be1 commit 09a2776

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7 files changed

+51
-22
lines changed

7 files changed

+51
-22
lines changed

‎rust-version

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1 +1 @@
1-
1a1876c9790f168fb51afa335a7ba3e6fc267d75
1+
bfe762e0ed2e95041cc12c02c5565c4368f2cc9f

‎src/diagnostics.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
use std::fmt::{self, Write};
22
use std::num::NonZero;
33

4-
use rustc_errors::{Diag, DiagnosticMessage, Level};
4+
use rustc_errors::{Diag, DiagMessage, Level};
55
use rustc_span::{SpanData, Symbol, DUMMY_SP};
66
use rustc_target::abi::{Align, Size};
77

@@ -95,7 +95,7 @@ impl fmt::Debug for TerminationInfo {
9595
}
9696

9797
impl MachineStopType for TerminationInfo {
98-
fn diagnostic_message(&self) -> DiagnosticMessage {
98+
fn diagnostic_message(&self) -> DiagMessage {
9999
self.to_string().into()
100100
}
101101
fn add_args(

‎src/helpers.rs

Lines changed: 9 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -1102,20 +1102,17 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> {
11021102
}
11031103
}
11041104

1105-
let (val, status) = match src.layout.ty.kind() {
1106-
// f32
1107-
ty::Float(FloatTy::F32) =>
1105+
let ty::Float(fty) = src.layout.ty.kind() else {
1106+
bug!("float_to_int_checked: non-float input type {}", src.layout.ty)
1107+
};
1108+
1109+
let (val, status) = match fty {
1110+
FloatTy::F16 => unimplemented!("f16_f128"),
1111+
FloatTy::F32 =>
11081112
float_to_int_inner::<Single>(this, src.to_scalar().to_f32()?, cast_to, round),
1109-
// f64
1110-
ty::Float(FloatTy::F64) =>
1113+
FloatTy::F64 =>
11111114
float_to_int_inner::<Double>(this, src.to_scalar().to_f64()?, cast_to, round),
1112-
// Nothing else
1113-
_ =>
1114-
span_bug!(
1115-
this.cur_span(),
1116-
"attempted float-to-int conversion with non-float input type {}",
1117-
src.layout.ty,
1118-
),
1115+
FloatTy::F128 => unimplemented!("f16_f128"),
11191116
};
11201117

11211118
if status.intersects(

‎src/shims/intrinsics/mod.rs

Lines changed: 8 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -274,13 +274,14 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> {
274274
_ => bug!(),
275275
};
276276
let float_finite = |x: &ImmTy<'tcx, _>| -> InterpResult<'tcx, bool> {
277-
Ok(match x.layout.ty.kind() {
278-
ty::Float(FloatTy::F32) => x.to_scalar().to_f32()?.is_finite(),
279-
ty::Float(FloatTy::F64) => x.to_scalar().to_f64()?.is_finite(),
280-
_ => bug!(
281-
"`{intrinsic_name}` called with non-float input type {ty:?}",
282-
ty = x.layout.ty,
283-
),
277+
let ty::Float(fty) = x.layout.ty.kind() else {
278+
bug!("float_finite: non-float input type {}", x.layout.ty)
279+
};
280+
Ok(match fty {
281+
FloatTy::F16 => unimplemented!("f16_f128"),
282+
FloatTy::F32 => x.to_scalar().to_f32()?.is_finite(),
283+
FloatTy::F64 => x.to_scalar().to_f64()?.is_finite(),
284+
FloatTy::F128 => unimplemented!("f16_f128"),
284285
})
285286
};
286287
match (float_finite(&a)?, float_finite(&b)?) {

‎src/shims/intrinsics/simd.rs

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -83,8 +83,10 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> {
8383
let op = op.to_scalar();
8484
// "Bitwise" operation, no NaN adjustments
8585
match float_ty {
86+
FloatTy::F16 => unimplemented!("f16_f128"),
8687
FloatTy::F32 => Scalar::from_f32(op.to_f32()?.abs()),
8788
FloatTy::F64 => Scalar::from_f64(op.to_f64()?.abs()),
89+
FloatTy::F128 => unimplemented!("f16_f128"),
8890
}
8991
}
9092
Op::Sqrt => {
@@ -93,6 +95,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> {
9395
};
9496
// FIXME using host floats
9597
match float_ty {
98+
FloatTy::F16 => unimplemented!("f16_f128"),
9699
FloatTy::F32 => {
97100
let f = op.to_scalar().to_f32()?;
98101
let res = f.to_host().sqrt().to_soft();
@@ -105,13 +108,15 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> {
105108
let res = this.adjust_nan(res, &[f]);
106109
Scalar::from(res)
107110
}
111+
FloatTy::F128 => unimplemented!("f16_f128"),
108112
}
109113
}
110114
Op::Round(rounding) => {
111115
let ty::Float(float_ty) = op.layout.ty.kind() else {
112116
span_bug!(this.cur_span(), "{} operand is not a float", intrinsic_name)
113117
};
114118
match float_ty {
119+
FloatTy::F16 => unimplemented!("f16_f128"),
115120
FloatTy::F32 => {
116121
let f = op.to_scalar().to_f32()?;
117122
let res = f.round_to_integral(rounding).value;
@@ -124,6 +129,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> {
124129
let res = this.adjust_nan(res, &[f]);
125130
Scalar::from_f64(res)
126131
}
132+
FloatTy::F128 => unimplemented!("f16_f128"),
127133
}
128134
}
129135
Op::Numeric(name) => {
@@ -267,6 +273,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> {
267273
span_bug!(this.cur_span(), "{} operand is not a float", intrinsic_name)
268274
};
269275
let val = match float_ty {
276+
FloatTy::F16 => unimplemented!("f16_f128"),
270277
FloatTy::F32 => {
271278
let a = a.to_f32()?;
272279
let b = b.to_f32()?;
@@ -283,6 +290,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> {
283290
let res = this.adjust_nan(res, &[a, b, c]);
284291
Scalar::from(res)
285292
}
293+
FloatTy::F128 => unimplemented!("f16_f128"),
286294
};
287295
this.write_scalar(val, &dest)?;
288296
}
@@ -724,6 +732,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> {
724732
let left = left.to_scalar();
725733
let right = right.to_scalar();
726734
Ok(match float_ty {
735+
FloatTy::F16 => unimplemented!("f16_f128"),
727736
FloatTy::F32 => {
728737
let left = left.to_f32()?;
729738
let right = right.to_f32()?;
@@ -744,6 +753,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> {
744753
let res = this.adjust_nan(res, &[left, right]);
745754
Scalar::from_f64(res)
746755
}
756+
FloatTy::F128 => unimplemented!("f16_f128"),
747757
})
748758
}
749759
}

‎src/shims/windows/foreign_items.rs

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -366,6 +366,12 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> {
366366

367367
this.WakeByAddressSingle(ptr_op)?;
368368
}
369+
"WakeByAddressAll" => {
370+
let [ptr_op] =
371+
this.check_shim(abi, Abi::System { unwind: false }, link_name, args)?;
372+
373+
this.WakeByAddressAll(ptr_op)?;
374+
}
369375

370376
// Dynamic symbol loading
371377
"GetProcAddress" => {

‎src/shims/windows/sync.rs

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -384,6 +384,21 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> {
384384

385385
Ok(())
386386
}
387+
fn WakeByAddressAll(&mut self, ptr_op: &OpTy<'tcx, Provenance>) -> InterpResult<'tcx> {
388+
let this = self.eval_context_mut();
389+
390+
let ptr = this.read_pointer(ptr_op)?;
391+
392+
// See the Linux futex implementation for why this fence exists.
393+
this.atomic_fence(AtomicFenceOrd::SeqCst)?;
394+
395+
while let Some(thread) = this.futex_wake(ptr.addr().bytes(), u32::MAX) {
396+
this.unblock_thread(thread);
397+
this.unregister_timeout_callback_if_exists(thread);
398+
}
399+
400+
Ok(())
401+
}
387402

388403
fn SleepConditionVariableSRW(
389404
&mut self,

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